公开(公告)号：US5767990A

公开(公告)日：1998-06-16

申请号：US561467

申请日：1995-11-21

Applicant: Osamu Ikeda

Inventor： Osamu Ikeda

IPC: G03B27/54 ,  H04N1/028 ,  H04N1/04 ,  H04N1/16 ,  H04N1/193

CPC classification number: H04N1/00981 ,  H04N1/02815 ,  H04N1/02825 ,  H04N1/02895 ,  H04N1/16 ,  H04N1/193

Abstract: An illumination device for a film image scanning device is provided. The illumination device is small in size compared to a size of the image to be scanned. Light emitted by a point light source at one end of the image scanning device is reflected back toward the point light source by first and second mirrors at an opposite end of the image scanning device. A third mirror reflects the light to a pair of condenser lenses that evenly transmit the light toward a film slide to be scanned. The light passes through one of the condenser lenses perpendicular to an optical axis of the condenser lens, thereby making the image scanning device compact. Fresnel lenses are also provided as condenser lenses.

Abstract translation: 提供了一种用于胶片图像扫描装置的照明装置。 与要扫描的图像的尺寸相比，照明装置的尺寸小。 由图像扫描装置一端的点光源发出的光在图像扫描装置的另一端被第一和第二反射镜反射回点光源。 第三个镜子将光反射到一对聚光透镜，其将光均匀地传送到要被扫描的胶片载玻片上。 光通过垂直于聚光透镜的光轴的聚光透镜中的一个，从而使图像扫描装置紧凑。 菲涅尔透镜也作为聚光镜提供。

公开(公告)号：US5504908A

公开(公告)日：1996-04-02

申请号：US39869

申请日：1993-03-30

Applicant: Osamu Ikeda

Inventor： Osamu Ikeda

IPC: G06F1/04 ,  G06F1/32 ,  G06F11/32

CPC classification number: G06F1/3215 ,  G06F1/324 ,  G06F11/325 ,  Y02B60/1217

Abstract: A power saving control system for a computer system including a CPU, is provided with a mode selecting circuit for selectively operating the CPU in a first mode with relatively high performance and high power consumption and a second mode with relatively low performance and low power consumption, a repeated access detecting circuit for monitoring addresses accessed by the CPU over a given period in order to detect a predetermined operational state of the CPU, in which only specific address group is repeatedly accessed, a control circuit associated with the first means for normally operating the first means in the first mode and responsive to the second means detecting the predetermined operational state, for operating the first means in the second mode as long as the predetermined operational state is maintained, and a state display for generating an indication perceptible by an operator of the computer system indicating current operational mode of the CPU.

Abstract translation: 一种用于包括CPU的计算机系统的省电控制系统，具有模式选择电路，用于以比较高性能和高功耗的第一模式选择性地操作CPU，以及具有相对低的性能和低功耗的第二模式， 重复访问检测电路，用于在给定时间段内监视由CPU访问的地址，以便检测其中仅特定地址组被重复存取的CPU的预定操作状态;与第一装置相关联的控制电路，用于正常操作 第一装置在第一模式中并且响应于检测预定操作状态的第二装置，用于仅在维持预定操作状态时操作第二模式中的第一装置，以及用于产生操作者可感知的指示的状态显示 计算机系统指示CPU的当前操作模式。

公开(公告)号：US5369085A

公开(公告)日：1994-11-29

申请号：US28185

申请日：1993-03-09

Applicant: Akemi Hosokawa ,  Osamu Ikeda ,  Noriko Minami ,  Nobuo Kyomura

Inventor： Akemi Hosokawa ,  Osamu Ikeda ,  Noriko Minami ,  Nobuo Kyomura

IPC: A01N35/06 ,  A01N37/02 ,  A01N37/42 ,  A01N41/04 ,  A01N41/10 ,  A01N43/20 ,  A01N43/40 ,  C07C45/68 ,  C07C49/683 ,  C07C49/697 ,  C07C49/747 ,  C07C69/007 ,  C07C205/45 ,  C07C251/44 ,  C07C255/40 ,  C07C255/47 ,  C07C309/66 ,  C07C317/24 ,  C07D213/46 ,  C07D213/50 ,  C07D303/32 ,  A01N43/02

CPC classification number: C07D303/32 ,  A01N35/06 ,  A01N37/02 ,  A01N37/42 ,  A01N41/04 ,  A01N41/10 ,  A01N43/20 ,  A01N43/40 ,  C07C255/40 ,  C07C309/66 ,  C07C317/24 ,  C07C45/68 ,  C07C49/683 ,  C07C49/697 ,  C07C49/747 ,  C07C69/007 ,  C07D213/50 ,  C07C2102/08

Abstract: Indane-1, 3-dione derivatives of the following general formula [I]: ##STR1## and herbicidal compositions containing them as an active ingredient are provided. The derivatives are highly valuable in exhibiting excellent herbicidal activity while causing markedly low damage on crops.

Abstract translation: 提供了以下通式[I]的茚满-1,3-二酮衍生物：和含有它们作为活性成分的除草组合物。 该衍生物在显示出优异的除草活性的同时对作物造成显着低的损害是非常有价值的。

公开(公告)号：US5050218A

公开(公告)日：1991-09-17

申请号：US657612

申请日：1991-02-19

Applicant: Osamu Ikeda ,  Kazunari Egami

Inventor： Osamu Ikeda ,  Kazunari Egami

IPC: G06K9/00 ,  G06K9/68

CPC classification number: G06K9/00 ,  G06K9/6807

Abstract: An address recognition apparatus and method is disclosed in which keyword and/or postal code detection is initially performed in order to limit the number of address dictionaries needed for final address detection. According to one embodiment, detected keywords are associated with property codes which may be designated for city names, street names, etc. The address dictionary memory is or can be separated into a plurality of segments, particular ones of which are selected on the basis of the property code of a given keyword.

Abstract translation: 公开了一种地址识别装置和方法，其中最初执行关键字和/或邮政编码检测，以限制最终地址检测所需的地址字典的数目。 根据一个实施例，检测到的关键字与可以为城市名称，街道名称等指定的属性代码相关联。地址字典存储器可以被分离成多个段，其中特定的段是基于 给定关键字的属性代码。

公开(公告)号：US20120034742A1

公开(公告)日：2012-02-09

申请号：US13276995

申请日：2011-10-19

Applicant: Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

Inventor： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

IPC: H01L21/50

CPC classification number: H01L23/49582 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/544 ,  H01L24/05 ,  H01L24/29 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/77 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L29/0615 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85214 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/83205 ,  H01L2924/206

Abstract: To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

Abstract translation: 实现密封在其中的功率MOSFET的小型表面安装封装的导通电阻的降低。 硅芯片安装在与构成漏极引线的引线集成的管芯焊盘部分上。 硅芯片在其主表面上具有源极焊盘和栅极焊盘。 硅芯片的背面配置功率MOSFET的漏极，并通过Ag浆料粘合到芯片焊盘部分的上表面。 构成源极引线的引线通过Al带电耦合到源极焊盘，而构成栅极引线的引线通过Au线电耦合到栅极焊盘。

公开(公告)号：US20110223718A1

公开(公告)日：2011-09-15

申请号：US13117544

申请日：2011-05-27

Applicant: Osamu Ikeda ,  Masato Nakamura ,  Satoshi Matsuyoshi ,  Koji Sasaki ,  Shinji Hiramitsu

Inventor： Osamu Ikeda ,  Masato Nakamura ,  Satoshi Matsuyoshi ,  Koji Sasaki ,  Shinji Hiramitsu

IPC: H01L21/60

CPC classification number: H05K3/3463 ,  B23K35/262 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29211 ,  H01L2224/29311 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32507 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H05K3/244 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01016 ,  H01L2924/01028 ,  H01L2924/01032 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material, and further including a method of producing the semiconductor device. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.

Abstract translation: 半导体器件包括半导体元件，利用第一接合材料接合到半导体元件的第一表面的支撑构件和利用第二接合材料接合到支撑在支撑构件上的半导体元件的第二表面的引线电极，以及 还包括制造半导体器件的方法。 支撑构件和引线电极的各个连接部分是镀镍的，并且第一和第二接合材料中的每一个是Cu 6 Sn 5含量大于共晶含量的Sn焊料。

公开(公告)号：US20100026847A1

公开(公告)日：2010-02-04

申请号：US12320083

申请日：2009-01-16

Applicant: Osamu Ikeda

Inventor： Osamu Ikeda

IPC: H04N5/76 ,  H04N5/222

CPC classification number: G11B31/006 ,  H04N1/2112 ,  H04N5/232 ,  H04N5/23293 ,  H04N5/772 ,  H04N5/85 ,  H04N17/00 ,  H04N17/002 ,  H04N21/47 ,  H04N2101/00

Abstract: An electronic camera having a plurality of functions including capturing and recording images is provided. The electronic camera includes an on input unit for inputting external operations that designate corresponding functions of the camera to be performed, an image pickup unit for capturing the image of an object, and a recorder for recording the image captured by the image pickup unit. The electronic camera further includes a playback unit for at least playing back image information that is recorded on the recording medium and a mode selector for selecting one operation mode of the camera from a plurality of available operation modes that include an operation explanation mode. If the operation explanation mode is selected at the mode selector, the playback unit plays back an operation guide that is pre-stored in a memory, the operation guide explaining at least one of the camera operations and functions thereof.

Abstract translation: 提供具有多个功能的电子照相机，包括拍摄和记录图像。 电子照相机包括用于输入指定要执行的相机的相应功能的外部操作的输入单元，用于捕获对象的图像的图像拾取单元和用于记录由图像拾取单元捕获的图像的记录器。 电子照相机还包括用于至少回放记录在记录介质上的图像信息的重放单元和用于从包括操作说明模式的多个可用操作模式中选择相机的一个操作模式的模式选择器。 如果在模式选择器处选择了操作说明模式，则播放单元播放预先存储在存储器中的操作指南，该操作指南解释了相机操作及其功能中的至少一个。

公开(公告)号：US20090321783A1

公开(公告)日：2009-12-31

申请号：US12493502

申请日：2009-06-29

Applicant: Shinji Hiramitsu ,  Hiroyuki Ohta ,  Koji Sasaki ,  Masato Nakamura ,  Osamu Ikeda ,  Satoshi Matsuyoshi

Inventor： Shinji Hiramitsu ,  Hiroyuki Ohta ,  Koji Sasaki ,  Masato Nakamura ,  Osamu Ikeda ,  Satoshi Matsuyoshi

IPC: H01L29/86

CPC classification number: H01L23/051 ,  H01L23/24 ,  H01L2224/33181

Abstract: A semiconductor device which includes a semiconductor chip; an electrically conductive base electrode bonded to the lower surface of the semiconductor chip by a first bonding member; an electrically conductive lead electrode bonded to the upper surface of the semiconductor chip by a second bonding member; and a first stress relief member for reducing stress developed in the first bonding member due to the difference in thermal expansion between the semiconductor chip and the base electrode, wherein both the base electrode and the first stress relief member are in direct contact with the lower surface of the first bonding member.

Abstract translation: 一种半导体器件，包括半导体芯片; 通过第一接合部件接合到半导体芯片的下表面的导电基极; 导电引线电极，通过第二接合构件接合到半导体芯片的上表面; 以及由于所述半导体芯片和所述基极之间的热膨胀差异而减小在所述第一接合构件中产生的应力的第一应力消除构件，其中所述基极和所述第一应力消除构件都与所述下表面直接接触 的第一粘合构件。

公开(公告)号：US07423349B2

公开(公告)日：2008-09-09

申请号：US11412090

申请日：2006-04-27

Applicant: Shosaku Ishihara ,  Osamu Ikeda ,  Ryouichi Kajiwara ,  Shinji Hiramitsu ,  Satoshi Matsuyoshi

Inventor： Shosaku Ishihara ,  Osamu Ikeda ,  Ryouichi Kajiwara ,  Shinji Hiramitsu ,  Satoshi Matsuyoshi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/24 ,  B23K35/007 ,  B23K35/264 ,  B23K2101/40 ,  B23K2103/12 ,  B23K2103/18 ,  B23K2103/56 ,  H01L23/49513 ,  H01L24/01 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12035 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3651 ,  Y10T428/31678 ,  H01L2924/00012 ,  H01L2924/01083 ,  H01L2924/01013 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/05599

Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.

Abstract translation: 本发明提供一种包含半导体元件和铜构件的半导体器件，其通过熔融温度不低于250℃的铋基（Bi系）接合材料彼此接合，其中银（Ag ）在与界面的银浓度倾斜的界面附近在接合材料附近的区域扩散，以实现半导体器件的制造，而不使用铅 低成本。

公开(公告)号：US20080198142A1

公开(公告)日：2008-08-21

申请号：US12100186

申请日：2008-04-09

Applicant: Masahiro Juen ,  Kenji Toyoda ,  Osamu Ikeda ,  Hisato Ide

Inventor： Masahiro Juen ,  Kenji Toyoda ,  Osamu Ikeda ,  Hisato Ide

IPC: G06F3/041

CPC classification number: G06F3/033 ,  G06F3/04845 ,  G06T1/00 ,  H04N1/00352 ,  H04N1/00397 ,  H04N1/00411 ,  H04N2101/00

Abstract: An image processing apparatus provided with a display unit for displaying an operation picture, showing control indicia (e.g., icons) corresponding to multiple image processing functions, is operated to display the operation picture on an external display device. The operator selects one of the indicia shown on the external display device by operating an input device, such as touch screen of the apparatus or a remote control, to indicate the position of the desired one of the indicia. The operator can thereby quickly and reliably select an image processing function to be executed, without any need to view an operation picture on the display unit when making the selection.

Abstract translation: 操作具有用于显示操作画面的显示单元的图像处理设备，显示与多个图像处理功能对应的控制标记（例如，图标），以在外部显示设备上显示操作画面。 操作者通过操作诸如设备的触摸屏或遥控器的输入设备来指示所需的一个标记的位置来选择外部显示设备上所示的一个标记。 因此，操作者能够快速，可靠地选择要执行的图像处理功能，而不需要在进行选择时在显示单元上观看操作画面。