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公开(公告)号:US11949175B2
公开(公告)日:2024-04-02
申请号:US17485332
申请日:2021-09-25
Applicant: QUALCOMM Incorporated
Inventor: Chuan Wang , Li Liu , Bhushan Shanti Asuri , Kevin Hsi-Huai Wang , Gurkanwal Singh Sahota
CPC classification number: H01Q9/0442 , H01L23/66 , H01Q1/2283 , H01Q1/243 , H01Q1/50 , H01Q5/50 , H01Q21/28 , H01Q23/00 , H01L2223/6677
Abstract: Designs and techniques for manufacturing microelectronic antenna tuners are provided. An example microelectronic antenna system includes a radio frequency integrated circuit comprising a plurality of radio frequency signal ports disposed in a first area, a plurality of tuning devices disposed in a second area of the radio frequency integrated circuit, at least one antenna element disposed on a substrate coupled to the radio frequency integrated circuit, and at least one feedline disposed in the substrate and configured to communicatively couple the at least one antenna element, at least one of the plurality of tuning devices, and one of the plurality of radio frequency signal ports.
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公开(公告)号:US20230111312A1
公开(公告)日:2023-04-13
申请号:US17450420
申请日:2021-10-08
Applicant: QUALCOMM Incorporated
Inventor: Mihir Vijay Laghate , Revathi Sundara Raghavan , Bhushan Shanti Asuri
Abstract: A method of wireless communication includes receiving a first beam using a first antenna device during an occasion of a reference signal. The method further includes receiving a second beam using a second antenna device that is distinct from the first antenna device during the occasion of the reference signal. Receiving the first beam and the second beam includes inputting, to a modem, a representation of a combination of the first beam and the second beam. Receiving the first beam and the second beam further includes generating, by the modem based on the representation, a first signal associated with the first beam using a first parameter associated with the first antenna device and a second signal associated with the second beam using a second parameter associated with the second antenna device.
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公开(公告)号:US11609253B2
公开(公告)日:2023-03-21
申请号:US17039827
申请日:2020-09-30
Applicant: QUALCOMM Incorporated
Inventor: Bhushan Shanti Asuri , Chinmaya Mishra , Omar Essam El-Aassar
Abstract: In certain aspects, an apparatus includes a power detector coupled between a power amplifier and an antenna, and a voltage detector coupled between the power amplifier and the antenna. The apparatus also includes a phase shifter coupled to the power detector, and a load measurement circuit coupled to the power detector, the voltage detector, and the phase shifter.
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公开(公告)号:US11495890B2
公开(公告)日:2022-11-08
申请号:US16870644
申请日:2020-05-08
Applicant: Qualcomm Incorporated
Inventor: Chinmaya Mishra , Bhushan Shanti Asuri
Abstract: An apparatus is disclosed for controlling a power amplifier that is coupled to an antenna element of an antenna array. In example implementations, an apparatus includes an antenna element of an antenna array and a power amplification system. The power amplification system includes at least one input node, at least one output node coupled to the antenna element, and at least one power amplifier branch coupled between the at least one input node and the at least one output node. The power amplification system also includes at least one feedback node coupled to the at least one output node, at least one control node, and a feedback control loop coupled between the at least one feedback node and the at least one control node.
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公开(公告)号:US20220060200A1
公开(公告)日:2022-02-24
申请号:US17001568
申请日:2020-08-24
Applicant: Qualcomm Incorporated
Inventor: Laya Mohammadi , Chirag Dipak Patel , Bhushan Shanti Asuri
Abstract: An apparatus is disclosed for phase-shifting signals with a compensation circuit. In example implementations, an apparatus for phase-shifting signals includes a phase shifter having a first port and a second port. The phase shifter also includes a signal phase generator, a compensation circuit, and a vector modulator. The compensation circuit includes a first capacitor with a first capacitance and a second capacitor with a second capacitance. The first capacitance is different from the second capacitance. The signal phase generator is coupled between the first port and the compensation circuit. The vector modulator is coupled between the compensation circuit and the second port.
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公开(公告)号:US11177849B2
公开(公告)日:2021-11-16
申请号:US17039775
申请日:2020-09-30
Applicant: Qualcomm Incorporated
Inventor: Chuan Wang , Li Liu , Kevin Hsi-Huai Wang , Bhushan Shanti Asuri , Kang Yang , Shrenik Patel
IPC: H04B1/401
Abstract: An apparatus is disclosed for transceiving signals in multiple modes. In example implementations, an apparatus includes a transceiver that includes a first amplifier; a mixer having at least one input node and at least one output node, with the at least one input node coupled to the first amplifier; and a second amplifier coupled to the at least one output node of the mixer. The transceiver also includes a first register coupled to the first amplifier and a second register coupled to the second amplifier. The transceiver further includes at least one memory realizing a lookup table. The at least one memory is coupled to the first register and the second register. The lookup table includes a first portion corresponding to a first mode of the transceiver and a second portion corresponding to a second mode of the transceiver.
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公开(公告)号:US20210351517A1
公开(公告)日:2021-11-11
申请号:US16870644
申请日:2020-05-08
Applicant: Qualcomm Incorporated
Inventor: Chinmaya Mishra , Bhushan Shanti Asuri
Abstract: An apparatus is disclosed for controlling a power amplifier that is coupled to an antenna element of an antenna array. In example implementations, an apparatus includes an antenna element of an antenna array and a power amplification system. The power amplification system includes at least one input node, at least one output node coupled to the antenna element, and at least one power amplifier branch coupled between the at least one input node and the at least one output node. The power amplification system also includes at least one feedback node coupled to the at least one output node, at least one control node, and a feedback control loop coupled between the at least one feedback node and the at least one control node.
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公开(公告)号:US11063617B1
公开(公告)日:2021-07-13
申请号:US16869898
申请日:2020-05-08
Applicant: QUALCOMM Incorporated
Inventor: Mohamed Abouzied , Ibrahim Ramez Chamas , Bhushan Shanti Asuri , Osama Elhadidy
Abstract: Certain aspects provide a circuit for frequency conversion. The circuit includes first mixer circuitry coupled to a load circuit and having a first mixer configured to generate a first portion of a frequency-converted differential signal to be provided to the load circuit based on first differential input signals and second differential input signals, and a second mixer configured to generate a second portion of the frequency-converted differential signal based on third differential input signals and fourth differential input signals. The circuit also includes second mixer circuitry coupled to another load circuit and having a third mixer configured to generate a first portion of another frequency-converted differential signal based on the first differential input signals and the fourth differential input signals, and a fourth mixer configured to generate a second portion of the other frequency-converted differential signal based on the third differential input signals and the second differential input signals.
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公开(公告)号:US10686476B1
公开(公告)日:2020-06-16
申请号:US16417455
申请日:2019-05-20
Applicant: QUALCOMM Incorporated
Inventor: Shahin Mehdizad Taleie , Nitz Saputra , Chen Jiang , Behnam Sedighi , Ibrahim Ramez Chamas , Bhushan Shanti Asuri , Dongwon Seo
Abstract: An RF-DAC transmitter is provided that includes an in-phase channel, a quadrature-phase channel, a first intermediate-phase channel, and a second intermediate-phase channel. Each channel includes a pair of interleaved RF-DACs for producing a pair of interleaved RF signals and a subtractor.
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公开(公告)号:US10666285B1
公开(公告)日:2020-05-26
申请号:US16202723
申请日:2018-11-28
Applicant: QUALCOMM Incorporated
Inventor: Shahin Mehdizad Taleie , Behnam Sedighi , Dongwon Seo , Parisa Mahmoudidaryan , Bhushan Shanti Asuri , Sang-June Park , Shrenik Patel
IPC: H03M1/66
Abstract: Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. One example system for digital-to-analog conversion generally includes a first digital-to-analog converter (DAC) having an input coupled to an input node of the system and a mixing-mode DAC having an input coupled to an input node of the system. The mixing-mode DAC may include a second DAC and a mixer, an output of the second DAC being coupled to an input of the mixer. The system may also include a combiner, wherein an output of the first DAC is coupled to a first input of the combiner, and wherein an output of the mixer is coupled to a second input of the combiner.
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