公开(公告)号：EP3304593A1

公开(公告)日：2018-04-11

申请号：EP16728787.9

申请日：2016-05-24

Applicant: Qualcomm Incorporated

Inventor： LEE, Jae Sik ,  HWANG, Kyu-Pyung ,  WE, Hong Bok

IPC: H01L25/065 ,  H01L25/10 ,  H01L23/14 ,  H01L23/00

CPC classification number: H01L25/18 ,  H01L21/486 ,  H01L21/565 ,  H01L23/147 ,  H01L23/3107 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/50 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/00 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/92225 ,  H01L2225/06548 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: A package-on-package (PoP) structure includes a first die, a second die, and a memory device electrically coupled to the first die and the second die by an interposer between the first die and the second die. The interposer includes copper-filled vias formed within a mold.

公开(公告)号：EP3132469A1

公开(公告)日：2017-02-22

申请号：EP15718725.3

申请日：2015-04-10

Applicant: Qualcomm Incorporated

Inventor： WE, Hong Bok ,  KIM, Chin-Kwan ,  KIM, Dong Wook ,  LEE, Jae Sik ,  HWANG, Kyu-Pyung ,  SONG, Young Kyu

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L21/48

CPC classification number: H01L21/768 ,  H01L21/4857 ,  H01L21/76802 ,  H01L21/76838 ,  H01L21/76879 ,  H01L21/76885 ,  H01L23/49822 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/014

Abstract: An integrated circuit (IC) substrate that includes a second patterned metal layer formed in between a first patterned metal layer is disclosed. A dielectric layer formed on the first patterned metal layer separates the two metal layers. A non-conductive layer is formed on the dielectric layer and the second patterned metal layer.

Abstract translation: 公开了一种集成电路（IC）衬底，其包括形成在第一图案化金属层之间的第二图案化金属层。 形成在第一图案化金属层上的电介质层分离两个金属层。 在电介质层和第二图案化金属层上形成非导电层。

公开(公告)号：EP3053188A1

公开(公告)日：2016-08-10

申请号：EP14790822.2

申请日：2014-09-26

Applicant: Qualcomm Incorporated

Inventor： KIM, Dong Wook ,  HWANG, Kyu-Pyung ,  SONG, Young Kyu ,  YUN, Changhan Hobie

IPC: H01L23/16 ,  H01L23/00

CPC classification number: H01L21/52 ,  H01L21/4817 ,  H01L23/04 ,  H01L23/13 ,  H01L23/16 ,  H01L28/60 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00

Abstract: Systems and methods for preventing warpage of a semiconductor substrate in a semiconductor package (200). A continuous or uninterrupted stiffener structure (208) is designed with a recessed groove (208b), such that passive components, such as, high density capacitors are housed within the recessed groove. The stiffener structure with the recessed groove is attached to the semiconductor substrate (202) using anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The stiffener structure with the recessed groove surrounds one or more semiconductor devices (204) that may be formed on the semiconductor substrate. The stiffener structure with the recessed groove does not extend beyond horizontal boundaries of the semiconductor substrate.