公开(公告)号：US20230114933A1

公开(公告)日：2023-04-13

申请号：US17958653

申请日：2022-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Kyung-Eun BYUN ,  Keunwook SHIN ,  Changseok LEE ,  Baekwon PARK

IPC: H01L21/02 ,  H01L23/532 ,  C23C16/40 ,  C23C16/455 ,  H01L21/768

Abstract: Provided are a graphene interconnect structure, an electronic device including the graphene interconnect structure, and a method of manufacturing the graphene interconnect structure. The graphene interconnect structure may include: a first oxide dielectric material layer; a second oxide dielectric material layer on a surface of the first oxide dielectric material layer and having a dielectric constant greater than that of the first oxide dielectric material layer; and a graphene layer on a surface of the second oxide dielectric material layer opposite to the surface on which the first oxide dielectric material layer is located.

公开(公告)号：US20230078018A1

公开(公告)日：2023-03-16

申请号：US17945534

申请日：2022-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Minseok YOO

IPC: H01L21/265 ,  H01L21/02 ,  C23C16/02 ,  C23C16/26

Abstract: Provided are a layer structure including a carbon-based material, a method of manufacturing the layer structure, an electronic device including the layer structure, and an electronic apparatus including the electronic device. The layer structure may include a lower layer, an ion implantation layer in the lower layer, and a carbon-based material layer on the ion implantation layer, wherein the ion implantation layer includes carbon. The ion implantation layer may include a trench, and the carbon-based material layer may be provided in the trench. The carbon-based material layer may be formed to coat an inner surface of the trench. The carbon-based material layer may fill at least a portion of the trench. The ion implantation concentration of the ion implantation layer may be uniform as a whole. The ion implantation layer may have an ion implantation concentration gradient in a given direction.

公开(公告)号：US20230072229A1

公开(公告)日：2023-03-09

申请号：US17668004

申请日：2022-02-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Sangwon KIM ,  Changhyun KIM ,  Kyung-Eun BYUN ,  Eunkyu LEE

IPC: H01L27/108 ,  H01L29/16 ,  H01L29/20 ,  H01L29/24 ,  H01L29/76 ,  H01L29/786

Abstract: Provided are a vertical-channel cell array transistor structure and a dynamic random-access memory (DRAM) device including the same. The vertical-channel cell array transistor structure includes a semiconductor substrate, a plurality of channels arranged in an array on the semiconductor substrate and each extending perpendicularly from the semiconductor substrate, a gate insulating layer on the plurality of channels, a plurality of word lines on the semiconductor substrate and extending in a first direction, and a two-dimensional (2D) material layer on at least one surface of each of the plurality of word lines.

公开(公告)号：US20220319602A1

公开(公告)日：2022-10-06

申请号：US17708362

申请日：2022-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Taein KIM ,  Youngtek OH ,  Hyeonjin SHIN ,  Changseok LEE

IPC: G11C16/04 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11578

Abstract: Provided is a vertical nonvolatile memory device in which a thickness of one memory cell is reduced to reduce an entire thickness of a memory cell string and increase the number of stacked memory cells. The nonvolatile memory device includes a plurality of memory cell strings. Each of the memory cell strings may include a plurality of insulating spacers each extending in a first direction, a plurality of gate electrodes each extending in the first direction and alternately arranged with the plurality of insulating spacers in a second direction perpendicular to the first direction, and a plurality of contacts respectively arranged to contact a side surface of the plurality of gate electrodes respectively corresponding to the plurality of contacts.

公开(公告)号：US20220302319A1

公开(公告)日：2022-09-22

申请号：US17495457

申请日：2021-10-06

Applicant: Samsung Electronics Co., Ltd. ,  UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Changseok LEE ,  Soonyong KWON ,  Junghwa KIM ,  Seungwoo SON ,  Seunguk SONG ,  Hyeonjin SHIN ,  Zonghoon LEE ,  Yeonchoo CHO

IPC: H01L29/786 ,  H01L29/16 ,  H01L29/66 ,  H01L29/06

Abstract: Provided is a thin-film structure including a substrate, a nanocrystalline graphene layer provided on the substrate, and a two-dimensional material layer provided on the nanocrystalline graphene layer. The nucleation density of the two-dimensional material layer is 109 ea/cm2 or more according to the nanocrystalline graphene layer, and accordingly, a two-dimensional material layer having an improved uniformity may be formed and a time duration for forming the two-dimensional material layer may be greatly decreased.

公开(公告)号：US20210210346A1

公开(公告)日：2021-07-08

申请号：US16923478

申请日：2020-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Kyungeun BYUN ,  Hyeonjin SHIN ,  Soyoung LEE ,  Changseok LEE

IPC: H01L21/02 ,  H01L29/16 ,  C23C16/50 ,  C23C16/26

Abstract: A graphene structure and a method of forming the graphene structure are provided. The graphene structure includes directly grown graphene that is directly grown on a surface of a substrate and has controlled surface energy.

公开(公告)号：US20210159183A1

公开(公告)日：2021-05-27

申请号：US17165246

申请日：2021-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun BYUN ,  Keunwook SHIN ,  Yonghoon KIM ,  Hyeonjin SHIN ,  Hyunjae SONG ,  Changseok LEE ,  Changhyun KIM ,  Yeonchoo CHO

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.

公开(公告)号：US20210125929A1

公开(公告)日：2021-04-29

申请号：US17082494

申请日：2020-10-28

Applicant: Samsung Electronics Co., Ltd. ,  UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Hyeonjin SHIN ,  Minhyun LEE ,  Changseok LEE ,  Hyeonsuk SHIN ,  Seokmo HONG

IPC: H01L23/532 ,  H01L23/522

Abstract: An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.

公开(公告)号：US20200035611A1

公开(公告)日：2020-01-30

申请号：US16215899

申请日：2018-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun Byun ,  Keunwook SHIN ,  Yonghoon KIM ,  Hyeonjin SHIN ,  Hyunjae SONG ,  Changseok LEE ,  Changhyun KIM ,  Yeonchoo CHO

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.

公开(公告)号：US20180149966A1

公开(公告)日：2018-05-31

申请号：US15807106

申请日：2017-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Hyunjae SONG ,  Seongjun PARK ,  Keunwook SHIN ,  Changseok LEE

IPC: G03F1/64 ,  G03F1/22 ,  G03F7/20

CPC classification number: G03F1/64 ,  G03F1/22 ,  G03F1/62 ,  G03F7/7015 ,  G03F7/70883

Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.