公开(公告)号：JPS59110222A

公开(公告)日：1984-06-26

申请号：JP22071282

申请日：1982-12-16

Applicant: Sony Corp

Inventor： ISHIKAWA FUMIO ,  TANAKA KUNINOBU

IPC: H03K5/151

CPC classification number: H03K5/151

Abstract: PURPOSE:To make two pulse signals which are in mutually negative-phase relation coincident in timing and waveform during inversion and to obtain two pulse signals which vary symmetrically about a specific level, by providing a two- phase pulse signal generating circuit with a correcting signal circuit. CONSTITUTION:Resistances 31 and 32 having an equal value are connected to output sides of buffer circuits 28 and 29 of the two-phase pulse signal generating circuit 11 in series, and the difference signal DF between a positive and a negative phase signal is outputted to the middle point P6 of the connection. This signal DF is inverted by the correcting signal circuit 33 and applied to the base of a transistor TR34 for correction to control voltages applied to load resistances 26 and 27 of a differential amplifying circuit 35. Consequently, positive- phase and negative-phase pulses phi1 and phi2 supplied from the circuit 11 to the diode bridge circuit 12 of a sample holding circuit 1 are controlled to a reference voltage value all the time. Thus, the two pulse signals are made coincident in timing and waveform during inversion to hold two pulses which vary symmetrically about the specific level by a sample holding capacitor 15.

Abstract translation: 目的：使反相中的时序和波形相互相关的两个脉冲信号相互重合，并通过提供具有校正信号的双相脉冲信号发生电路，获得关于特定电平对称变化的两个脉冲信号 电路。 构成：具有相等值的电阻31和32串联连接到两相脉冲信号发生电路11的缓冲电路28和29的输出侧，并将正相和负相位信号之间的差信号DF输出到 连接点的中点P6。 该信号DF由校正信号电路33反相，并施加到晶体管TR34的基极用于校正，以控制施加到差分放大电路35的负载电阻26和27的电压。因此，正相和负相脉冲ph1 从电路11向样品保持电路1的二极管电路12提供的phi2始终被控制为基准电压值。 因此，在反转期间使两个脉冲信号在定时和波形中重合，以保持由样本保持电容器15围绕特定电平对称地改变的两个脉冲。

公开(公告)号：JPS5313330A

公开(公告)日：1978-02-06

申请号：JP8751876

申请日：1976-07-22

Applicant: SONY CORP

Inventor： ISHIKAWA FUMIO ,  TSUDA YUKIO

IPC: H03H5/00 ,  H03H5/12 ,  H03H7/01 ,  H03J3/18

Abstract: PURPOSE:By using the capacity elment of the lumped constant type and the inductive element, the broad band resonance circuit is realized which is simple to constitute and regulate and is easy to be miniaturized, so that this circuit can be used efficiently in the miniaturized video receiver and the receiver of VYF band.

公开(公告)号：JPS524151A

公开(公告)日：1977-01-13

申请号：JP8021775

申请日：1975-06-27

Applicant: SONY CORP

Inventor： ISHIKAWA FUMIO

IPC: H03B5/12 ,  H03B5/08

Abstract: PURPOSE:To lower the floating capacity by combining two FET's of gate grounding type and drain grounding type, and to obtain an oscillating signal of high frequency and output level.

公开(公告)号：JPH10145299A

公开(公告)日：1998-05-29

申请号：JP31877896

申请日：1996-11-14

Applicant: SONY CORP

Inventor： ISHIKAWA FUMIO

IPC: H04N7/22 ,  H04B3/44 ,  H04B10/2507 ,  H04B10/293 ,  H04B10/564 ,  H04B10/572 ,  H04B10/80 ,  H04N21/647 ,  H04B10/02 ,  H04B10/04 ,  H04B10/06 ,  H04B10/14 ,  H04B10/18

Abstract: PROBLEM TO BE SOLVED: To enable long distance transmission, without attenuating the output of an optical signal by converting into an optical signal based on an electric signal that is corrected to a state before attenuation, converting a power output into a prescribed power and correcting to a power output of a prescribed power before drop. SOLUTION: When a waveform-shaping part 37 is activated by the power output of a prescribed power that is supplied by a repeater internal power source 38 and when an optical signal S3 that is sent from a video camera 2 is attenuated, a repeater 5 once converts the signal S3 into a pulse signal S3A through a photoelectric conversion circuit 31. An optical signal S3' that has undergone photoelectric conversion based on the signal S3A, is returned to output power that is close to about 0.191(mW) before it is attenuated and outputted to a CPU 3 via an optical fiber cable 4. Even though the output power of the signal S3 may be attenuated during transmission because it is one rank weaker in degree, the repeater 5 can return the output power of an attenuated optical signal S3 into the signal S3' of the output power that is close to about 0.191(mW) prior to attenuation.

公开(公告)号：JPH0722847A

公开(公告)日：1995-01-24

申请号：JP18911693

申请日：1993-06-30

Applicant: SONY CORP

Inventor： KITAZONO SHINICHI ,  ISHIKAWA FUMIO

IPC: H03D7/00 ,  H04B1/26

Abstract: PURPOSE:To obtain an optimum mixer driving amplitude in a wide bind by connecting a peaking circuit to the load of a buffer amplifier. CONSTITUTION:In the frequency conversion circuit provided with a mixer circuit 12, which mixes a high frequency (RF) signal and a local oscillation(OSC) signal and converts the frequency of the RF signal to output them, and a buffer amplifier 13 which charges the OSC signal to the mixer circuit 12, peaking circuits R12 and R11 are connected to loads Q3 and Q4 of the buffer amplifier 13. Peaking circuits R12 and R11 are connected to the buffer amplifier 13 to extend the amplitude of charging to the mixer circuit 12 in the case of the OSC signal having a high frequency. Thus, frequency conversion is always efficiently performed. The frequency characteristic of a flat conversion gain and a flat noise index is realized in a wide band.

公开(公告)号：JPH0334477A

公开(公告)日：1991-02-14

申请号：JP16884889

申请日：1989-06-30

Applicant: SONY CORP ,  MITSUBISHI RAYON CO

Inventor： ISHIKAWA FUMIO ,  YAMAMOTO TETSUO ,  AOKI TAKAYUKI ,  YAGI KEIJI

IPC: H04B10/60 ,  H01L33/00 ,  H04B10/07 ,  H04B10/40 ,  H04B10/50 ,  H04B10/516 ,  H04B10/564

Abstract: PURPOSE:To enable execution of a high-speed operation by a simple construction and with low power consumption by providing a switch circuit which is connected in parallel to a light emitting diode and ON-OFF controlled on the basis of an inverted digital signal obtained by inverting a digital signal. CONSTITUTION:During a period when a light-emitting diode 5 is lighted in accordance with a rise of an input signal SIN, a switch circuit 11 is controlled to be in an OFF state on the basis of a switch control signal SSW delivered from a pulse voltage generator 12, and thereby all of a collector current IC of a drive transistor 4 having an overshoot component can be made to flow to the light-emitting diode 5. On the occasion when a rise characteristic is improved by increasing the amount of overshoot of the collector current IC, in this way, the effect of the improvement is further increased so that a rise time of an emission output L10 of the light-emitting diode 5 can be further shortened, while power consumption can be reduced by that no current flows unnecessarily to a part other than the light-emitting diode 5.

公开(公告)号：JPH0327579A

公开(公告)日：1991-02-05

申请号：JP16186189

申请日：1989-06-24

Applicant: MITSUBISHI RAYON CO ,  SONY CORP

Inventor： YAGI KEIJI ,  ZENBA KAZUHIRO ,  SEKIGUCHI YUKIHIRO ,  ISHIKAWA FUMIO ,  YAMAMOTO TETSUO ,  AOKI TAKAYUKI

IPC: H04B10/60 ,  H01L33/00 ,  H04B10/07 ,  H04B10/2507 ,  H04B10/40 ,  H04B10/50 ,  H04B10/564

Abstract: PURPOSE:To perform a high speed drive and to prevent current consumption from varying by adding a peaking current to a driving current at the time of light emission, feeding it in parallel with a LED after a light pulse output is risen, and shortcircuiting both ends of the LED at the time of extinguishing a light emission. CONSTITUTION:A transistor Tr 14 is turned ON simultaneously upon supply of a normal current ID at the time of light emission of a LED 2, and a peaking current IP is fed to the LED 2. As a result, the rising time of a light pulse output 2a is largely shortened. If the Tr 14 is turned OFF after the output is risen, a current IQ corresponding to a current IP flowing to the Tr 14 is fed through a Tr 9 by the operation of a constant current circuit 23. Since the Tr 9 is provided in parallel with the LED 2, the current IQ does not pass the LED 2. Accordingly, since current consumption of a whole circuit is not varied, an erroneous operation by a noise is not generated. When the LED 2 is extinguished, a TR 15 is turned OFF, a Tr 16 is turned ON, and no current ID flows to the LED 2. In this case, a Tr 13 is turned ON, and the LED 2 is conducted at both ends.

公开(公告)号：JPH0232719B2

公开(公告)日：1990-07-23

申请号：JP21411681

申请日：1981-12-28

Applicant: SONY CORP

Inventor： ISHIKAWA FUMIO

IPC: G11C27/02 ,  H03K7/02

公开(公告)号：JPH01282907A

公开(公告)日：1989-11-14

申请号：JP11218088

申请日：1988-05-09

Applicant: SONY CORP

Inventor： KITAZONO SHINICHI ,  ISHIKAWA FUMIO

IPC: H03B5/04 ,  H03B5/12

Abstract: PURPOSE:To attain temperature compensation inexpensively with simple constitution by connecting plural 1st diodes in series so as to form a reference bias and applying a reverse bias to a 2nd diode so as to form a capacitance. CONSTITUTION:The 1st diodes (Dod) 1-3 are connected in series in the oscillation circuit, a power voltage is connected to an emitter (base) of the Dod 1 via a resistor 4, a collector of the Dod 3 is connected to ground and a capacitor 5 is connected in parallel with the Dod 1-3. The 2nd Dod 6 is provided, the emitter (base) of the Dod 6 is connected to the emitter (base) of the Dod 1, and the collector is connected to a collector of a transistor(TR) 21. A capacitor is formed by applying a reverse bias to the Dod 6, the bias varies with the temperature characteristic of the Dod 1-3 and then the capacitance is varied therewith. Then the capacitor by the Dod 6 is provided in parallel with the capacitor 31 of the resonance circuit 30, acts like part of the resonance capacitor and some degree of temperature compensation is applied by the capacitor of the Dod 6.

公开(公告)号：JPS6038892B2

公开(公告)日：1985-09-03

申请号：JP15490377

申请日：1977-12-22

Applicant: SONY CORP

Inventor： ISHIKAWA FUMIO

IPC: H03H7/01 ,  H03H7/12 ,  H03J3/18