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公开(公告)号：JPH05114252A
公开(公告)日：1993-05-07
申请号：JP30232991
申请日：1991-10-22
Applicant: SONY CORP
Inventor： HIROSE TOSHIHIKO , MUTO TAKAYASU
Abstract: PURPOSE:To detect a fault so as to improve the positioning accuracy of a head by recording signals by using a servo pattern which is formed by adding dummy bits to gray codes and detecting an address error by counting the number of the dummy bits contained in reproduced signals. CONSTITUTION:At the time of detecting the position of a head arm 21, a sector servo pattern(SSP) recorded by adding dummy bits to gray codes on a magnetic disk 10 is reproduced and the position detection is controlled on the basis of obtained positional information. Reproduced signals from the SSP are inputted to an AGC equalizer circuit 231 through a head 21a and read/write circuit 22 and, of the information of the SSP, information regarding track addresses and information regarding tracking are supplied to a detection circuit 234 and pulse detection circuit 232. The circuit 232 discriminates the level of RF signals and supplies the discriminated level to a servo detection circuit 233. The circuit 233 discriminates the occurrence of an address error when the number of the dummy bits added to gray-like codes and contained in reproduced signals does not reach a specific number.
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公开(公告)号：JPH02226012A
公开(公告)日：1990-09-07
申请号：JP4595689
申请日：1989-02-27
Applicant: SONY CORP
Inventor： MUTO TAKAYASU
IPC: G01D5/36
Abstract: PURPOSE:To perform rapid and accurate adjustment by adjusting the gain of a detector corresponding to the difference between the max. and min. values of a triangular wave obtained from the detector and also adjusting the offset of the detector corresponding to the sum of the max. and min. values. CONSTITUTION:The light from a light emitting diode 9 is detected by four photodiodes 5 - 9 through a scale having slits formed thereto and the outputs of the respective photodiodes 5 - 9 become triangular waves with the movement of the scale. The outputs of the first - fourth detection circuits 1 - 4 corresponding to the respective photodiodes are changed over by a change-over switch 13 and the max. and min. values of the triangular wave at every detection circuit are calculated and the gain of a gain control circuit 55 is adjusted so that the difference between the max. and min. values becomes a predetermined value and the offset quantity of a voltage offset quantity control circuit 56 is controlled so that the sum of the max. and min. values becomes a predetermined value. This calculation is performed by a microcomputer 11.
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公开(公告)号：JPH02148473A
公开(公告)日：1990-06-07
申请号：JP30176888
申请日：1988-11-29
Applicant: SONY CORP
Inventor： MUTO TAKAYASU
Abstract: PURPOSE:To execute the stable and satisfactory recording and reproducing of data by using an arm position sensor, seeking a track, using a servo signal on a disk, executing position servo and simultaneously separating seek operation. CONSTITUTION:An arm position sensor 10 generates a period signal with the move of a head arm 4. The servo signal is arranged in a sector shape on a disk 1. Then, a track pulse is obtained from a generating circuit 28 according to the signal of the arm position sensor 10 and a head arm moving speed signal is obtained from a converting circuit 25. By these signals, operation is executed to seek a head 3 to a track, which is a purpose. After that, the position servo is executed by using the servo signal and at the time of this position servo, the seek operation is separated by a switch 33. Thus, the stable and satisfactory recording and reproducing of the data can be executed.
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公开(公告)号：JPH02137173A
公开(公告)日：1990-05-25
申请号：JP29167588
申请日：1988-11-18
Applicant: SONY CORP
Inventor： SUGITA JUNKICHI , MUTO TAKAYASU , FUJIKAWA DAISUKE , KAWABATA TOMOMIKI
IPC: G11B20/14
Abstract: PURPOSE:To eliminate the dispersion of parts accuracy by clearing a third counter when the outputs of first and second counters go to be >= a fixed value and generating a preambre detecting output when the output of a third counter goes to be >= the fixed value. CONSTITUTION:When reproducing data are sampled by sampling circuits 7 and 8, first and second counters 9 and 11 are respectively reset. Then, a basic clock CLK is counted by the first counter 9 and an inverted signal INCLK of the basic clock CLK is counted by the second counter 11 respectively. The count values of the first and second counters 9 and 11 are compared with an N-fold value of the period of the basic clock CLK in first and second comparators 12 and 13. Then, when the both values go to be >= the N, the third counter 15 is reset. Next, the third counter 15 starts counting and when the count value goes to be >= a value M to be set in advance, the presmbre detecting output is outputted. Thus, the dispersion can be eliminated for the accuracy of the parts.
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公开(公告)号：JPH0279277A
公开(公告)日：1990-03-19
申请号：JP23162288
申请日：1988-09-16
Applicant: SONY CORP
Inventor： SETO HIDEKAZU , MUTO TAKAYASU
Abstract: PURPOSE:To execute excellent shipping lock at the time of unoperating in a simple constitution without using extra power by holding a shipping lock arm by means of a parmanent magnet at the time of operating, and releasing the holding of the back electromotive force of a spindle motor at the time of stopping. CONSTITUTION:A holding means consisting of a parmanent magnet 9 to hold the shipping lock arm against deviation force is possessed, and a coil 10 to generate a magnetic field in a direction to cancel the magnetic force of the parmanent magnet 9 by prescribed feeding is provided in the holding means 10. At the time of operating, the shipping lock arm is held by the holding means, the head arm is freely moved, and at the time of unoperating, the holding is released by the back electromotive force of a spindle motor 11. Thus, without using the extra power, the excellent shipping lock at the time of unoperating can be executed in the simple constitution.
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Patent Agency Ranking
公开(公告)号：JPS6383976A
公开(公告)日：1988-04-14
申请号：JP22907286
申请日：1986-09-27
Applicant: SONY CORP
Inventor： MUTO TAKAYASU , TADA HARUTAKA
Abstract: PURPOSE:To suppress the extent of overshoot of a head to a small value by gradually raising the level of the position reference used for accurate positioning control in accordance with elapse of time after rough positioning control using a head position detecting sensor. CONSTITUTION:After the head is roughly positioned to a target rack on the basis of a detection output TOB of a head position detecting sensor 7, track position information preliminarily recorded on a magnetic disk 4 is picked up by the head 1. The extent of deviation of the head 1 from the center of the target track is detected on the basis of this track position information FIS, and the level of a position reference REF 3 used for accurate positioning control is gradually raised from a prescribed level according as the time elapses. Thus, the extent of overshoot of the head is held down to a small value to prevent runaway of a head arm.
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公开(公告)号：JP2007013520A
公开(公告)日：2007-01-18
申请号：JP2005191163
申请日：2005-06-30
Inventor： TAKAHASHI KEN , MUTO TAKAYASU , YOSHIDA HIDEKI , YAMAMOTO TAKEHIRO , NAKAYAMA YOICHI , HATA NOBORU , ITO ATSUSHI , SAITO KENICHI , UEDA SATOSHI , SAWADA KEISUKE , OSHIMA SATORU
IPC: H04L12/951 , H04L12/801 , H04L12/911
Abstract: PROBLEM TO BE SOLVED: To provide a communication equipment and a communication system for acquiring through-put characteristics and latency characteristics necessary for a system. SOLUTION: This communication equipment is provided with an interface 106 for aggregating a plurality of input packets into one packet, and for outputting them in a batch, and the interface 106 aggregates the input packets based on the dynamically specifiable number of packets, and when the input packets are interrupted during aggregation, the interface 106 aggregates the already inputted packets after the lapse of a dynamically specifiable time-out time. COPYRIGHT: (C)2007,JPO&INPIT
Abstract translation: 要解决的问题：提供一种通信设备和用于获取系统所需的通过特性和延迟特性的通信系统。 解决方案：该通信设备设置有用于将多个输入分组聚合成一个分组并且用于批量输出的接口106，并且接口106基于动态指定数量的分组来聚合输入分组， 并且当在聚合期间输入分组被中断时，接口106在经过可动态指定的超时时间之后聚合已经输入的分组。 版权所有（C）2007，JPO＆INPIT
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公开(公告)号：JP2004260478A
公开(公告)日：2004-09-16
申请号：JP2003048091
申请日：2003-02-25
Inventor： TAKAHASHI YOSHIHISA , MUTO TAKAYASU , SANNOMIYA JASON
CPC classification number: H04B1/7085 , G01S19/235 , G01S19/29 , H04B1/7087 , H04B2201/70715
Abstract: PROBLEM TO BE SOLVED: To provide a communication device that reliably finds a frequency even if an oscillation frequency in an oscillator changes, reliably achieves synchronization, and can continue to synchronously hold of a carrier. SOLUTION: At a synchronously capturing section 46, a fixed timelike stabilization region is used for frequency search in a satellite, thus reliably finding the frequency of the satellite. Additionally, the amount Δf of a change in the frequency of a reference signal by a control unit is received. After the frequency of the reference signal is changed, the frequency search in the satellite is made by a frequency before the frequency of the reference signal is changed. At least two clock stabilization regions are used for the frequency search in the satellite, thus achieving the frequency search in the satellite for hours. Further, when the frequency of a reference signal Fox changes after the frequency search in the satellite, the amount of change (f+Δf) is delivered to a synchronously holding section 47, thus synchronizing the frequency of the satellite. COPYRIGHT: (C)2004,JPO&NCIPI
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公开(公告)号：JPH1117773A
公开(公告)日：1999-01-22
申请号：JP16480997
申请日：1997-06-20
Applicant: SONY CORP
Inventor： MUTO TAKAYASU
Abstract: PROBLEM TO BE SOLVED: To provide a circuit for enabling smooth transmission/reception by dividing data to be transferred into data more than one, calculating the leading address of the next packet by adding a transfer data component from a leading bus address, generating the transmission packet of bus address addition at least and sending it to a serial interface when transferring the data of a present node to the other node. SOLUTION: A request packet generating circuit 122 divides computer data recorded through a transport data interface circuit 121 onto a hard disk into data more than one so as to be divided into packets in the case of write when the instruction of data transfer start from a control register 107 of a link layer circuit 100, and the address of an SBP protocol is calculated based on data such as the length of data set to the control register 107, and stored in a FIFO 124 for request. In the case of reception, the address of the SBP protocol is calculated.
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公开(公告)号：JPH1117743A
公开(公告)日：1999-01-22
申请号：JP16481197
申请日：1997-06-20
Applicant: SONY CORP
Inventor： MUTO TAKAYASU
Abstract: PROBLEM TO BE SOLVED: To provide a serial interface circuit with which the data of a large capacitance are made into packet corresponding to a prescribed standard and can be transmitted/received and smooth transmission/reception processing is enabled. SOLUTION: At the time of receiving operation, a request packet is generated at a request packet generation circuit 122, the maximum data length of a response packet corresponding to the request packet to be transmitted is calculated, a transaction controller 126 compares the maximum data length maxpl with the remaining storage capacity of a FIFO 125 for response and when the remaining storage capacity is more than the maximum data length maxpl, the request packet is transmitted. When the remaining storage capacity is less than the maximum data length maxpl, the output of the request packet to a link core 101 is constituted so as to temporarily stop the transmission of the request packet to another node until the remaining storage capacity gets more than the maximum data length maxpl.
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