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公开(公告)号：JP2004193850A
公开(公告)日：2004-07-08
申请号：JP2002357949
申请日：2002-12-10
Inventor： HASHIMOTO YASUHIRO , TAKASHIMA MASATOSHI
IPC: H04N19/50 , H03M7/36 , H04N19/102 , H04N19/132 , H04N19/166 , H04N19/172 , H04N19/423 , H04N19/503 , H04N19/587 , H04N19/593 , H04N19/65 , H04N19/67 , H04N7/32
Abstract: PROBLEM TO BE SOLVED: To prevent deterioration of image quality more than in the conventional method.
SOLUTION: Only when receiving error notice data D4 from an image decoder, an intra-refresh is executed and an encoding frame rate is decreased at the same time. Thus, the deterioration in the image quality of a frame itself can be prevented by increasing a code amount assignable to the frame at a fixed bit rate by a share of the encoded frame rate set smaller and deterioration in the image quality in an entire moving picture such as uneven motion or loss of smoothness can also be prevented by suppressing a variation rate in the frame rate by a share of the frame rate made constant when no decoding error actually takes place on the decoder side.
COPYRIGHT: (C)2004,JPO&NCIPI-
公开(公告)号：JP2004015111A
公开(公告)日：2004-01-15
申请号：JP2002161911
申请日：2002-06-03
Inventor： TAKASHIMA MASATOSHI
IPC: H04N5/765 , H04J3/06 , H04L29/06 , H04N7/173 , H04N19/00 , H04N19/103 , H04N19/152 , H04N19/166 , H04N19/423 , H04N19/70 , H04N21/438 , H04N21/442 , H04N21/6336
CPC classification number: H04N21/23406 , H04J3/0632 , H04L29/06027 , H04L65/4084 , H04L65/80 , H04N21/44004
Abstract: PROBLEM TO BE SOLVED: To reduce the end-to-end delay time.
SOLUTION: This data distribution system is provided with a transmitter for transmitting a data stream via a network, and a receiver that receives the data stream, stores the received data stream to a reception buffer, and decodes the data stream stored in the reception buffer. The amount of data storage of the reception buffer which is sufficient for consecutively decoding a received data stream (consecutively decodable amount of data storage) is estimated in the network independently of variations of a data transfer time from the transmitter to the receiver. The receiver starts decoding the received data stream at a decoding rate lower than a decoding rate estimated at encoding in a period from the start of reception of the data until data equivalent to the amount of consecutively decodable data storage are stored. Further, the receiver revises the decoding rate into the decoding rate estimated at the encoding after the reception buffer has stored an amount of data equivalent to the amount of consecutively decodable data storage.
COPYRIGHT: (C)2004,JPO-
公开(公告)号：JP2003348594A
公开(公告)日：2003-12-05
申请号：JP2002152717
申请日：2002-05-27
Inventor： OGURA YOSHIYUKI , TAKASHIMA MASATOSHI
IPC: H04N19/50 , G06T9/00 , H03M7/36 , H04N19/44 , H04N19/503 , H04N19/577 , H04N19/593 , H04N19/61 , H04N19/625 , H04N19/65 , H04N19/89 , H04N19/895 , H04N19/91 , H04N7/32
CPC classification number: H04N19/895 , H04N19/61
Abstract: PROBLEM TO BE SOLVED: To reduce deterioration in image quality by suppressing error propagation involved in error concealing processing even when an image block during decoding refers to a frame including an error in motion compensation. SOLUTION: An MPEG decoding device 10 is provided with a motion compensation circuit 15 and an error map table 19 holding an error map table for decoded frames to be referred to in performing the motion compensation. The error map table 19 shows error blocks that are present in the decoded frames. The motion compensation circuit 15 refers to the error map table 19, and performs error concealing processing that compensates pixels in a decoding object block with pixels of the decoded frame and outputs the block when an error block is included in blocks included in a reference area or when moving image encoded data in the decoding object block are damaged. The motion compensation circuit 15 also generates and stores an error map table, wherein a block subjected to the error concealing processing is defined as an error block. COPYRIGHT: (C)2004,JPO
Abstract translation: 要解决的问题：即使当解码期间的图像块是指包括运动补偿中的误差的帧时，通过抑制误差隐藏处理中的误差传播来减少图像质量的劣化。 解决方案：MPEG解码装置10具有运动补偿电路15和错误映射表19，该差分映象表保存执行运动补偿时要参考的解码帧的误差映射表。 误差映射表19示出存在于解码帧中的错误块。 运动补偿电路15参照错误映射表19，进行误差隐藏处理，该纠错处理用解码帧的像素补偿解码对象块中的像素，并且当包含在参考区域中的块中包含错误块时，输出块 当解码对象块中的运动图像编码数据被损坏时。 运动补偿电路15还生成并存储错误映射表，其中经过错误隐藏处理的块被定义为错误块。 版权所有（C）2004，JPO
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公开(公告)号：JPH11252548A
公开(公告)日：1999-09-17
申请号：JP4807898
申请日：1998-02-27
Applicant: SONY CORP
Inventor： TAKASHIMA MASATOSHI , HIRANAKA DAISUKE
IPC: H04N19/102 , H03M7/40 , H04N7/24 , H04N19/00 , H04N19/152 , H04N19/423 , H04N19/625 , H04N19/70 , H04N19/91
Abstract: PROBLEM TO BE SOLVED: To obtain a compression coder and its method that conducts rate control so as to prevent a failure of a decode buffer when an output buffer has such a quantity of data that cannot be read in the case that encoding/ decoding is conducted in real time in a transmission system. SOLUTION: A variable length coding(VLC) circuit 14 applies variable length coding to output data from an encode core section 11 in access units to obtain coded data and gives a header to the coded data in the access units. A controller 15 sets a narrower input/output range of the coded data in an output buffer by a data quantity that cannot be read from a DRAM 13. Furthermore, the controller 15 delays a timing when read-out of the data from the output buffer is started by the time resulting from dividing an offset sum of an initial value to a data quantity equivalent to read-disabled quantity after data of a first access unit are produced in the encode section by a bit rate.
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公开(公告)号：JPH11251922A
公开(公告)日：1999-09-17
申请号：JP4807998
申请日：1998-02-27
Applicant: SONY CORP
Inventor： TAKASHIMA MASATOSHI , OTSUKI TOMOYUKI
IPC: H04N5/907 , H03M7/40 , H04N5/765 , H04N5/91 , H04N5/92 , H04N5/922 , H04N7/08 , H04N7/081 , H04N7/24 , H04N19/00 , H04N19/115 , H04N19/15 , H04N19/423 , H04N19/91
Abstract: PROBLEM TO BE SOLVED: To provide a compression-encoding device and method capable of the stuffing of a large amount at a high speed when a stuffing operation is required so as not to overflow the decoder buffer of a decoding device. SOLUTION: A VLC(variable length coding) and byte stuffing circuit 14 variable length codes output data from an encoding core part 11 by the unit of a prescribed access unit, turns them to encoded data and inserts the stuffing data of a byte unit into the encoded data. A word stuffing circuit 17 inserts the stuffing data of a word unit into the encoded data of the unit of the access unit. A virtual stuffing circuit 20 virtually performs the stuffing to the encoded data stored in a DRAM 13 and performs actual stuffing by the unit at the time of read. A controller 15 controls the compression-encoding and stuffing based on a picture input timing detected in a synchronization detection circuit 16.
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Patent Agency Ranking
公开(公告)号：JPH0795585A
公开(公告)日：1995-04-07
申请号：JP25496593
申请日：1993-09-17
Applicant: SONY CORP
Inventor： TAKASHIMA MASATOSHI , OGURA HIDEFUMI
IPC: H04N19/50 , H04N19/42 , H04N19/423 , H04N19/51 , H04N19/523 , H04N19/53 , H04N19/59 , H04N7/32
Abstract: PURPOSE:To reduce the circuit scale by decreasing an arithmetic quantity without deteriorating the detection accuracy when a moving vector whose picture element accuracy is less than 1/2 picture element. CONSTITUTION:The detector is provided with an interpolation circuit 8 forming an interpolation picture element between picture elements of picture data of a check block. The interpolation circuit 8 is an interpolation circuit for two picture elements to form interpolation picture elements in horizontal and vertical directions with respect to a current picture element. Only the two picture elements in the horizontal and vertical directions are interpolated and no interpolation for 4 picture elements is conducted, the arithmetic quantity is considerably reduced and then the circuit scale is decreased. Since a moving vector is detected within a range where a correct moving vector is in existence with high possibility, the detection accuracy is not deteriorated.
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公开(公告)号：JPH05328399A
公开(公告)日：1993-12-10
申请号：JP15136592
申请日：1992-05-19
Applicant: SONY CORP
Inventor： TAKASHIMA MASATOSHI , KOMAZAKI TAKAHIRO
Abstract: PURPOSE:To reduce waveform distortion due to emphasis in color difference signals by sampling the color difference signals for a period longer than luminance signals. CONSTITUTION:The luminance signal Y is inputted through an LPF 1 to an A/D converter 2 and A/D converted. Then, the output of the converter 2 is inputted to a vertical nonlinear emphasis circuit 3, emphasized nonlinearly in a vertical direction and supplied to a time division multiplex circuit (TDM) 4. Also, the color difference signal PB is inputted through the LPF 5 to the A/D converter 6, A/D converted and filter processed with a vertical filter 7. Then, the output of the filter 7 is supplied to the TDM 4. Similarly, the color difference signal PR is also supplied through the LPF 9, the A/D converter 10, the vertical filter 11 and the vertical nonlinear emphasis circuit 12 to the TDM 4. At this time, the A,/D converters 6 and 10 sample the period longer than the A/0 converter 2.
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公开(公告)号：JPH05236426A
公开(公告)日：1993-09-10
申请号：JP3658892
申请日：1992-02-24
Applicant: SONY CORP
Inventor： SAKAMOTO ETSURO , OIKAWA YUKA , TAKASHIMA MASATOSHI
Abstract: PURPOSE:To effectively reduce the waveform distortion of output signals by composing the circuit of an HPF for extracting a high frequency component after the emphasis of digital signals, level limter to be supplied the high frequency component, and subtraction part. CONSTITUTION:A digital video signal DVA obtained by executing a non-linear emphasis processing to a digital video signal having a prescribed sampling frequency is supplied from an input terminal 31 to a subtraction part 32 and an HPF 33. A high frequency component DHB to reduce that level in the signal DVA is obtained from the HPF 33, and it is turned to a high frequency component DLK by multiplying a prescribed coefficient K1 at a level adjusting part 34 and supplied to a level limiter 35. At the limiter 35, the amplitude is limited to a prescribed level, and a high frequency component DKBL is obtained. Next, the subtraction part 32 subtracts the component DKBL from the signal DVA from the terminal 31, and a signal DV' executing a non-linear emphasis processing to the signal DVA is obtained at an output terminal 36.
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公开(公告)号：JPH05152891A
公开(公告)日：1993-06-18
申请号：JP31443291
申请日：1991-11-28
Applicant: SONY CORP
Inventor： SAKAMOTO ETSURO , TAKASHIMA MASATOSHI , OTSUKI TOMOYUKI
Abstract: PURPOSE:To implement the equal processing to the oversampling through the use of a low speed circuit. CONSTITUTION:An input signal is fed to a 1st filter 2E having only taps corresponding to an even order of an FIR filter forming an input side low pass filter required for oversampling processing and to a 2nd filter 2O having only taps of odd number order and outputs of the 1st and 2nd filters are fed respectively to 1st and 2nd limiter (processing) circuits 3E, 3O, and the signal from the 1st and 3rd limiter circuits is fed to a 3rd filter 4E having only taps corresponding to an even order of an FIR filter forming an output side low pass filter required for oversampling processing and to a 4th filter 4O having only taps of odd number order and outputs of the 3rd and 4th filters are synthesized by a delay circuit 5 and an adder 6 and an output signal is obtained at an output terminal 7.
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公开(公告)号：JPH0564138A
公开(公告)日：1993-03-12
申请号：JP24478791
申请日：1991-08-30
Applicant: SONY CORP
Inventor： TAKASHIMA MASATOSHI , NISHIMURA AKIRA
IPC: H04N5/92
Abstract: PURPOSE:To prevent the deterioration in picture quality due to a level difference between channels and the deterioration in the resolution by varying a de- emphasis quantity applied to recording data in response to level detection data. CONSTITUTION:When recording data subject to emphasis processing, divided into plural channels and plural tracks and recorded on a magnetic tape are reproduced, level detection circuits 20, 22 detect respectively levels of luminance data Y and thinning color difference data PR. Then the level detection data are fed to a luminance variable vertical filter 16 and a chrominance variable vertical filter 21, which vary the de-emphasis quantity applied to luminance data Y and color difference data PB, PR, in response to the detected level so as to reduce the de-emphasis quantity in a region where a level difference of the recording data between channels is not remarkable. Thus, the deterioration in the picture quality is prevented and the deterioration in the resolution due to excess application of de-emphasis is prevented.
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