公开(公告)号：US11908504B2

公开(公告)日：2024-02-20

申请号：US17719637

申请日：2022-04-13

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G11C11/22 ,  H10B51/20 ,  H10B51/30

CPC classification number: G11C11/223 ,  G11C11/2273 ,  G11C11/2275 ,  H10B51/20 ,  H10B51/30

Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.

公开(公告)号：US20220406396A1

公开(公告)日：2022-12-22

申请号：US17845643

申请日：2022-06-21

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G11C29/44 ,  G11C29/46 ,  G11C29/12 ,  G11C16/34

Abstract: A data storage system can utilize one or more data storage devices that employ a solid-state non-volatile read destructive memory consisting of ferroelectric memory cells. A leveling strategy can be generated by a wear module connected to the memory with the leveling strategy prescribing a plurality of memory cell operating parameters associated with different amounts of cell wear. The wear module may monitor activity of a memory cell and detect an amount of wear in the memory cell as a result of the monitored activity, which can prompt changing a default set of operating parameters for the memory cell to a first stage of operating parameters, as prescribed by the leveling strategy, in response to the detected amount of wear.

公开(公告)号：US20220399054A1

公开(公告)日：2022-12-15

申请号：US17840779

申请日：2022-06-15

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G11C11/56 ,  G11C11/22

Abstract: A non-volatile memory (NVM) is formed of memory cells each having multiple ferroelectric memory elements (FMEs). Each FME stores data in relation to an electrical polarity of a recording layer formed of ferroelectric or anti-ferroelectric material. Each multi-FME memory cell is coupled to a set of external control lines activated by a control circuit in a selected order to perform program and/or read operations upon the FMEs. The FMEs may share a nominally identical construction or may have different constructions. Data are programmed and written responsive to the respective program/read responses of the FMEs. Constructions can include ferroelectric tunneling junctions (FTJs), ferroelectric random access memory (FeRAM), and ferroelectric field effect transistors (FeFETs). The NVM may form a portion of a data storage device, such as a solid-state drive (SSD).

公开(公告)号：US20220328086A1

公开(公告)日：2022-10-13

申请号：US17719637

申请日：2022-04-13

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G11C11/22 ,  H01L27/1159 ,  H01L27/11597

Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.

公开(公告)号：US11455402B2

公开(公告)日：2022-09-27

申请号：US16261960

申请日：2019-01-30

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham

IPC: G06F21/60 ,  G06F3/06

Abstract: Apparatus and method for selective overwrite protection of data stored in a non-volatile memory (NVM) with fine precision. In some embodiments, a write command is received from a host device to write one or more blocks of data having associated logical addresses to the NVM. A read operation is performed in response to the write command to read a tag value associated with each block. The write command is disallowed in response to the tag value indicating a protected version of the block having the associated logical address is already stored at the selected location. The tag value may be a key version value indicative of a version of an encryption key used to encrypt user data in the data block and whether the block is write-protected.

公开(公告)号：US11119797B2

公开(公告)日：2021-09-14

申请号：US16129520

申请日：2018-09-12

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Timothy T. Walker ,  Mark A. Gaertner ,  Christopher A. Markey ,  Chiaming Yang ,  Bryan D. Wyatt

IPC: G06F9/455 ,  G06F8/40 ,  G06F8/61 ,  G06F9/445

Abstract: An application programming interface (API) that enables installation of an application as one or more key-value objects on a data storage drive such as a hard disk drive, a solid state drive or a hybrid drive. The API also enables execution of the application within a controlled environment of the data storage drive.

公开(公告)号：US10936350B2

公开(公告)日：2021-03-02

申请号：US16720927

申请日：2019-12-19

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Chiaming Yang ,  Jon D. Trantham ,  Timothy Richard Feldman ,  Bryan David Wyatt ,  David B. Anderson ,  Robert John Warmka

IPC: G06F9/455 ,  G06F8/40 ,  G06F8/61 ,  G06F9/445

Abstract: An application programming interface (API) that enables installation of an application as one or more key-value objects on a data storage drive such as a hard disk drive, a solid state drive or a hybrid drive. The API also enables execution of the application within a controlled environment of the data storage drive.

公开(公告)号：US20200302966A1

公开(公告)日：2020-09-24

申请号：US16358255

申请日：2019-03-19

Applicant: Seagate Technology LLC

Inventor： Brett R. Herdendorf ,  Jon D. Trantham ,  Anil J. Reddy ,  Riyan Alex Mendonsa ,  Krishnan Subramanian

IPC: G11B15/68 ,  G11B20/10

Abstract: A data storage library includes a number of storage cartridges arranged in a rack accessed by a actuated media player. The actuated media player is adapted to move the along a plane relative to a fixed subset of the storage cartridges in the rack to and to selectively couple to each storage cartridge of the fixed subset to facilitate selective read/write access.

公开(公告)号：US10783910B2

公开(公告)日：2020-09-22

申请号：US16571475

申请日：2019-09-16

Applicant: Seagate Technology LLC

Inventor： Wenzhong Zhu ,  Kenneth Haapala ,  Jon D. Trantham

IPC: G11B5/55 ,  G11B5/48 ,  G11B5/012 ,  G11B5/54

Abstract: A recording surface of a magnetic disk is divided into first and second zones. A first head of a first actuator arm assembly reads from and/or writes to the first zone exclusively. A second head of a second actuator arm assembly reads from and/or writes to the second zone exclusively. The first and second head are capable of simultaneously reading from and writing to the recording surface.

公开(公告)号：US10664172B1

公开(公告)日：2020-05-26

申请号：US15844774

申请日：2017-12-18

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Bruce Douglas Buch ,  Kyaw Sin Maung ,  Aaron P. Weyer

IPC: G11B5/54 ,  G06F3/06 ,  G06F12/06 ,  G06F21/60

Abstract: A data storage device includes a first system-on-a-chip (SOC) associated with a first read transducer that accesses one or more magnetic disks of the data storage drive. The first SOC has a first read channel operable to receive data from the first read transducer. A second SOC is associated with a second read transducer that accesses the one or more magnetic disks of the data storage drive independently of the first read transducer. The second SOC has a second read channel operable to receive second data from the second read transducer. The first and second SOCs are coupled via a data bus that facilitates communicating the first and second data to a host via a first host interface.