公开(公告)号：JP2005210724A

公开(公告)日：2005-08-04

申请号：JP2005011616

申请日：2005-01-19

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： COUET JEAN-YVES

IPC: H04B1/18 ,  H04H40/90 ,  H04L12/28 ,  H04N5/00 ,  H04N7/10 ,  H04N7/20 ,  H04N21/436 ,  H04N21/61 ,  H04N21/647

CPC classification number: H04H40/90 ,  H04N7/104

Abstract: PROBLEM TO BE SOLVED: To enable processing units of the same satellite receiving equipment to share functions.
SOLUTION: The satellite receiving equipment comprises: a receiver 3 which receives a satellite signal 1, selectes one external signal from among several external signals included in the satellite signal 1, and preprocesses it; processing units 213, 214 and 215 which are connected to the receiver via corresponding wire links 216, 217, and 218, respectively, and perform receiving operation in the satellite intermediate band; and a signal distributing part 207 which has a switching matrix 208 for switching the external signal selected after preprocessing to at least one processing unit via the wire links 216, 217, and 218. At least one connection is provided in the satellite receiving equipment, which transmits an internal signal to be transmitted at an SIB by the predetermined first processing unit 214 to at least one predetermined second processing unit 213 via the signal distributing part 207.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：使同一卫星接收设备的处理单元能够共享功能。 卫星接收设备包括：接收卫星信号1的接收机3，从包括在卫星信号1中的几个外部信号中选择一个外部信号，并对其进行预处理; 处理单元213,214和215，它们分别经由对应的线路链路216,217和218连接到接收机，并在卫星中间频带中执行接收操作; 信号分配部分207具有切换矩阵208，用于经由有线链路216,217和218将预处理后选择的外部信号切换到至少一个处理单元。卫星接收设备中至少提供一个连接，其中 通过信号分配部207将由SIB发送的内部信号经由预定的第一处理单元214发送到至少一个预定的第二处理单元213.版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005137006A

公开(公告)日：2005-05-26

申请号：JP2004315941

申请日：2004-10-29

Applicant: Stmicroelectronics Sa ,  Univ D'aix-Marseille I ,  エステーミクロエレクトロニクス ソシエテ アノニム ,  ユニヴェルスィテ デクス−マルセイユ Iuniversite D´Aix−Marseille I

Inventor： ENGUENT JEAN-PIERRE ,  ARTIGUE OLIVIER ,  TETELIN CLAUDE

IPC: H03D1/02 ,  H04L27/06

CPC classification number: H04L27/06 ,  H03D1/02

Abstract: PROBLEM TO BE SOLVED: To decrease a sampling frequency of an analog-to-digital converter upstream of an amplitude demodulator, and a phase demodulator in some cases. SOLUTION: This digital modulator is provided with an amplitude demodulation method, and a converter for sampling an input signal having its sampling frequency corresponding to three times a demodulation carrier frequency. The demodulator comprises a means for calculating an amplitude A of a symbol of an input signal applying a formula (4), where ei designates the value of a digitized sample of a rank (i) among three successive samples provided by (the) converter, and where (k) designates a constant. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：在一些情况下，降低幅度解调器上游的模数转换器的采样频率和相位解调器。 解决方案：该数字调制器具有幅度解调方法，以及用于对其采样频率对应于解调载波频率三倍的输入信号进行采样的转换器。 解调器包括用于计算应用公式（4）的输入信号的符号的振幅A的装置，其中ei表示由（）转换器提供的三个连续样本中的等级（i）的数字化样本的值， 其中（k）表示常数。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005056413A

公开(公告)日：2005-03-03

申请号：JP2004221714

申请日：2004-07-29

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： TEGLIA YANNICK ,  LIARDET PIERRE-YVAN

IPC: G06F21/24 ,  G06F21/22 ,  H04L9/06 ,  H04L9/10 ,  G06F1/00 ,  G06F12/14

CPC classification number: H04L9/003 ,  H04L9/302 ,  H04L2209/046 ,  H04L2209/08

Abstract: PROBLEM TO BE SOLVED: To provide a method for masking a plurality of identical function processes for manipulating digital data. SOLUTION: The function processes are divided into a plurality of steps; the processes are interrupted, when each step is completed to save at least one intermediate result; and the step of at least two processes is continuously executed for selecting the process of the next step, according to a non-determined argument, when each step is completed. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于屏蔽用于操纵数字数据的多个相同功能处理的方法。 功能过程分为多个步骤; 当每个步骤完成以节省至少一个中间结果时，过程被中断; 并且当每个步骤完成时，连续地执行至少两个处理的步骤，用于根据未确定的参数来选择下一步骤的处理。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004312996A

公开(公告)日：2004-11-04

申请号：JP2004109740

申请日：2004-04-02

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： BIENVENU PHILIPPE ,  MATTEI SANDRA

IPC: H02J7/00 ,  H02H1/04 ,  H02H11/00

CPC classification number: H02H11/003 ,  H02H1/04 ,  Y10T307/931

Abstract: PROBLEM TO BE SOLVED: To provide a protective device against polarity reversal which overcomes a disadvantage of a well-known device. SOLUTION: The device protecting a circuit against polarity reversal of a connection part to a DC power supply device includes a controllable switch placed between a first terminal of a first voltage of the DC power supply device and the connection part between the first terminals of the circuit, and a first means turning off the switch with a delay under existence of a reverse polarity. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004288159A

公开(公告)日：2004-10-14

申请号：JP2003395442

申请日：2003-11-26

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： BARDOUILLET MICHEL

IPC: G06F7/58 ,  H03K3/84

CPC classification number: G06F7/588 ,  H03K3/84

Abstract: PROBLEM TO BE SOLVED: To provide a random number generator by flip-flop. SOLUTION: The flip-flop has a data input part receiving a first signal of a first frequency included in a specific range and having an instantaneous value conditioned by a disturbing signal, and a clock input part receiving a second signal of a second specific frequency lower than the first frequency, and the delay equal to the maximum period of the first signal or more, is given to the second signal, when the second signal passes through a delay element. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004274023A

公开(公告)日：2004-09-30

申请号：JP2003344481

申请日：2003-10-02

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： MARTY MICHEL ,  CORONEL PHILIPPE ,  LEVERD FRANCOIS

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/08 ,  H01L29/417 ,  H01L29/732

CPC classification number: H01L29/66272 ,  H01L29/0821 ,  H01L29/41708

Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit for increasing the conductivity of a buried layer and for maintaining two functions such as bonding and separation for contacts and a substrate.
SOLUTION: In an integrated circuit including a buried layer 13 of a predetermined conductivity type in a plane substantially parallel to a plane of a main circuit surface, it is characterized in that a layer portion 15 made of a selectively etchable material is formed, and the layer portion 15 is removed by isotropic etching, and a median portion of the buried layer 13 is filled with a metal-form material.
COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2004259273A

公开(公告)日：2004-09-16

申请号：JP2004046083

申请日：2004-02-23

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： TEGLIA YANNICK

IPC: G06F21/24 ,  G06F21/02 ,  G06K19/073 ,  G06F12/14

CPC classification number: G06K19/073 ,  G06K19/07372

Abstract: PROBLEM TO BE SOLVED: To provide a device capable of decisive locking and selecting an operation mode of an integrated circuit including no fuse or reverse fuse causing a similar problem and a manufacturing method for the device.
SOLUTION: This selection device is provided with a nonvolatile memory programmable after manufacturing exhibiting prior to any programming an initial content, means for storing a first signature representative of the initial content of the memory, and means for calculating a second signature representative of a current content of the memory. The selection device selects the operation mode of the integrated circuit including means for evaluating a difference between the first and the second signature and for deactivating an operation mode selection signal when the difference is greater than a predetermined threshold value.
COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种能够决定性地锁定和选择不包括引起类似问题的保险丝或反向保险丝的集成电路的操作模式的装置和装置的制造方法的装置。 解决方案：该选择装置具有可编程的非易失性存储器，其在制造前表现出初始内容的任何编程之前，用于存储表示存储器的初始内容的第一签名的装置，以及用于计算第二签名代表的装置 当前内存的内存。 选择装置选择集成电路的操作模式，包括用于评估第一和第二签名之间的差异的装置，以及当差值大于预定阈值时停用操作模式选择信号。 版权所有（C）2004，JPO＆NCIPI

公开(公告)号：JP2004233354A

公开(公告)日：2004-08-19

申请号：JP2004018143

申请日：2004-01-27

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： WUIDART SYLVIE ,  ZAHRA CLAUDE

IPC: G01R31/28 ,  G01R31/3185 ,  G01R31/3193

CPC classification number: G01R31/318505 ,  G01R31/31937 ,  G11C2029/2602

Abstract: PROBLEM TO BE SOLVED: To provide a testing method, in which some of same integrated circuit (IC) chips are tested, in parallel with asynchronous actions via two physical connections between a circuit tester and each chip.
SOLUTION: The testing method comprises the means of outputting a 1st test control signal from a tester to the IC chip; conducting test by each IC chip using an asynchronized method; outputting a 2nd result request signal from the voltmeter to the IC chip, after outputting the 1st control signal and following a prescribed time interval; and making all the chips to respond synchronously when the 2nd control signals are received.
COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2004222250A

公开(公告)日：2004-08-05

申请号：JP2003414799

申请日：2003-12-12

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： GUITTON FABRICE ,  DUPONT FRANCOIS

IPC: H03H7/075 ,  H03H7/09 ,  H03H7/42 ,  H03H7/46

CPC classification number: H03H7/422 ,  H03H7/42

Abstract: PROBLEM TO BE SOLVED: To provide a mode-switching transformer with frequency selectivity in which a common-mode filter is used for a differential mode, phase shift between an input and an output of the differential mode is substantially fixed in a passband and its size is minimized. SOLUTION: The mode-switching transformer with frequency selectivity on a band centered on a first frequency, is provided with, between a same common mode input/output terminal and respectively one of two differential mode input/output terminals, a high-pass filter with a cut-off frequency smaller than said first frequency, and a band-pass filter with a central frequency greater than said first frequency. COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2004208308A

公开(公告)日：2004-07-22

申请号：JP2003422194

申请日：2003-12-19

Applicant: Stmicroelectronics Sa ,  エステーミクロエレクトロニクス ソシエテ アノニム

Inventor： ROELENS FREDERIC

IPC: H04N5/93 ,  G11B20/10 ,  G11B27/10 ,  H04N7/52

CPC classification number: H04N21/4307 ,  H04N21/4341

Abstract: PROBLEM TO BE SOLVED: To provide a synchronizing method suitable for reproducing an audio frame and/or a video frame. SOLUTION: The method for synchronizing reproduction of the audio frame and/or the video frame comprises detecting a reproduction time stamp (PTS) in a stream of frames. A reproduction time (t(PTS)) indicated by the time stamp is compared with a time (t(IPCR)) indicated by a local reference clock (2). In accordance with a variant value (V) of a deviation value between the reproduction time and the corresponding time indicated by the clock and a means value (M) of the variant value, the clock is initialized according to the reproduction time indicated by the time stamp (107) or the reproduction of frames is regulated (109, 110). COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：提供适合于再现音频帧和/或视频帧的同步方法。 解决方案：用于同步音频帧和/或视频帧的再现的方法包括检测帧流中的再现时间戳（PTS）。 将由时间戳指示的再现时间（t（PTS））与由本地参考时钟（2）指示的时间（t（IPCR））进行比较。 根据再现时间与时钟指示的对应时间之间的偏差值和变量值的均值（M）的变化值（V），根据由时间表示的再现时间来初始化时钟 邮票（107）或框架的再现被规定（109,110）。 版权所有（C）2004，JPO＆NCIPI