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公开(公告)号：KR1020100071360A
公开(公告)日：2010-06-29
申请号：KR1020080130040
申请日：2008-12-19
Applicant: 한국전자통신연구원
CPC classification number: H04L27/265 , H04L5/0023 , H04L27/261 , H04L27/2655 , H04L27/2695
Abstract: PURPOSE: A demodulator system and a method for controlling the same are provided to verify a channel with respect to a signal propagation path by dividing channels according to extracted orders based on a channel estimation value and the reference signal of data received from a plurality of receiving antennas. CONSTITUTION: A multiple carrier demodulator(110) extracts valid data by eliminating the protective section of data signal inputted from a plurality of antennas, performing a fast Fourier transformation, and eliminating the protective band. A channel estimator(120) extracts a reference signal from the valid data and synchronizes the valid data. Through a frequency and linear interpolation, the channel estimator calculates and outputs a channel estimate value based on the combination of antennas. A frame deformatter(130) extracts a channel for a signal propagation path from the synchronized data and successively outputs the channel. A protective section eliminator eliminates the protective section after an inverse fast Fourier transformation when a final signal is outputted from a base station modulator.
Abstract translation: 目的：提供一种解调器系统及其控制方法，用于基于信道估计值和从多个接收中接收的数据的参考信号，根据提取的次序对信道传播路径进行分割，以验证信道 天线。 构成：多载波解调器（110）通过消除从多个天线输入的数据信号的保护部分，执行快速傅立叶变换并消除保护频带来提取有效数据。 信道估计器（120）从有效数据中提取参考信号并同步有效数据。 通过频率和线性内插，信道估计器基于天线的组合计算并输出信道估计值。 帧去格式化器（130）从同步数据中提取用于信号传播路径的信道，并连续地输出该信道。 当从基站调制器输出最终信号时，保护部分消除器在快速傅里叶逆变换之后消除了保护部分。
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公开(公告)号：KR100930719B1
公开(公告)日：2009-12-09
申请号：KR1020070132621
申请日：2007-12-17
IPC: H04L27/32
Abstract: 단말의 변조 장치는 상향링크 공유 채널을 위한 PUSCH 신호를 생성하고, 상향링크 제어 채널을 위한 PUCCH 신호를 생성하며, PUSCH 신호 또는 PUCCH 신호를 복조 하기 위한 DMRS 신호를 생성한다. 단말의 변조 장치는 상향링크 프레임의 신호 순서에 따라 PUSCH 신호와 PUCCH 신호 중 하나를 선택하여 선택 신호를 출력하고, 선택 신호에 대해 이산 푸리에 변환을 하여 제1 변환 신호를 생성하며, 제1 변환 신호 및 DMRS 신호 중 하나의 신호를 선택하여 부반송파 매핑 신호를 생성한다. 또한, 변조 장치는 부반송파 매핑 신호를 역고속 푸리에 변환하여 상향링크 프레임의 심볼을 생성하고, 상향링크 프레임의 심볼 동기를 위한 지연 시간만큼 심볼을 지연하여 전송한다.
3G LTE, 변조기, SC-FDMA, OFDM, PUSCH, PUCCH, DMRS, SNRS, RAPAbstract translation: 提供调制方法和调制设备以通过找到增加资源消耗的并行处理过程的最佳点来减少处理时间。 PUSCH（物理上行链路共享信道）信号生成部（110）生成PUSCH信号。 PUCCH（物理上行链路控制信道）信号生成部（120）生成PUCCH信号。 DRMS（解调参考信号）信号生成部（130）生成DRMS信号。 SNRS（探测参考信号）信号生成部分（140）生成SNRS信号。 RAP（随机接入前导码）信号生成部（150）生成RAP信号。 符号映射器（200）执行符号映射。 增益控制部分（300）产生第一增益控制信号和第二增益控制信号。 第一选择部分（310）输出选择信号。 DFT（离散傅立叶变换）（400）生成离散傅里叶变换信号。 第二选择部件（410）选择离散傅里叶变换信号中的一个信号以及DRMS信号生成部件和SNRS信号生成部件的输出信号。 子载波映射部分（500）生成子载波映射信号。 IFFT（快速傅立叶逆变换）（600）生成上行链路帧的符号。 CP（循环前缀）（700）执行循环前缀的插入。
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Patent Agency Ranking
公开(公告)号：KR1020090065162A
公开(公告)日：2009-06-22
申请号：KR1020070132621
申请日：2007-12-17
IPC: H04L27/32
CPC classification number: H04L27/2628 , H04L5/0007 , H04L5/005 , H04L27/2636 , H04L27/2662
Abstract: A modulation method and a modulation apparatus are provided to reduce a processing time by finding an optimum point of a parallel processing process which increases resource consumption. A PUSCH(Physical Uplink Shared Channel) signal generating part(110) generates a PUSCH signal. A PUCCH(Physical Uplink Control Channel) signal generating part(120) generates a PUCCH signal. A DRMS(Demodulation Reference Signal) signal generating part(130) generates a DRMS signal. A SNRS(Sounding Reference Signal) signal generating part(140) generates a SNRS signal. A RAP(Random Access Preamble) signal generating part(150) generates a RAP signal. A symbol mapper(200) performs symbol mapping. A gain control part(300) generates a first gain control signal and a second gain control signal. A first selecting part(310) outputs a selecting signal. A DFT(Discrete Fourier Transform)(400) generates a discrete fourier transform signal. A second selecting part(410) selects one signal among the discrete fourier transform signal and output signals of the DRMS signal generating part and the SNRS signal generating part. A subcarrier mapping part(500) generates a subcarrier mapping signal. An IFFT(Inverse Fast Fourier Transform)(600) generates a symbol of an up-link frame. A CP(Cyclic Prefix)(700) performs insertion of a cyclic prefix.
Abstract translation: 提供调制方法和调制装置，通过找到增加资源消耗的并行处理过程的最佳点来减少处理时间。 PUSCH（物理上行链路共享信道）信号生成部（110）生成PUSCH信号。 PUCCH（物理上行链路控制信道）信号生成部（120）生成PUCCH信号。 DRMS（解调参考信号）信号产生部分（130）产生DRMS信号。 SNRS（探测参考信号）信号产生部分（140）产生SNRS信号。 RAP（随机接入前导）信号产生部分（150）产生RAP信号。 符号映射器（200）执行符号映射。 增益控制部分（300）产生第一增益控制信号和第二增益控制信号。 第一选择部（310）输出选择信号。 DFT（离散傅里叶变换）（400）产生离散傅里叶变换信号。 第二选择部分（410）选择离散傅里叶变换信号中的一个信号和DRMS信号产生部分和SNRS信号产生部分的输出信号。 副载波映射部（500）生成副载波映射信号。 IFFT（快速傅里叶逆变换）（600）产生上行链路帧的符号。 CP（循环前缀）（700）执行循环前缀的插入。
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公开(公告)号：KR100827369B1
公开(公告)日：2008-05-06
申请号：KR1020070022341
申请日：2007-03-07
Applicant: 한국전자통신연구원
CPC classification number: H04L7/027 , H04L7/0079 , H04L7/033
Abstract: An apparatus and a method for acquiring synchronization are provided to obtain the synchronization by using an auto-correlation value and a cross-correlation value, and to reduce a memory by adding a sample extracting unit to the apparatus. An apparatus for acquiring synchronization comprises an auto-correlating unit(210), a sample extracting unit(220), an auto-correlation value accumulating unit(230), a first maximum value position calculating unit(240), a cross-correlating unit(250), a cross-correlation value accumulating unit(260), and a second maximum value position calculating unit(270). The auto-correlating unit performs auto-correlation for a received signal. The sample extracting unit samples the auto-correlated value. The auto-correlation value accumulating unit accumulates the extracted auto-correlation value. The first maximum value position calculating unit calculates a position of the auto-correlation value having the largest value among the accumulated values. The cross-correlating unit forms a window having a certain range with the calculated position value as a center, and calculates a cross-correlation value within the window. The cross-correlation value accumulating unit accumulates the cross-correlation value. The second maximum value position calculating unit calculates a position of the cross-correlation value having the largest value among the accumulated cross-correlation values.
Abstract translation: 提供一种用于获取同步的装置和方法，以通过使用自相关值和互相关值来获得同步，并且通过将样本提取单元添加到该装置来减少存储器。 一种用于获取同步的装置，包括自动相关单元（210），采样提取单元（220），自相关值累积单元（230），第一最大值位置计算单元（240），互相关单元 （250），互相关值累积单元（260）和第二最大值位置计算单元（270）。 自动相关单元对接收到的信号进行自相关。 样本提取单元对自动相关值进行采样。 自相关值累积单元累积提取的自相关值。 第一最大值位置计算单元计算累积值中具有最大值的自相关值的位置。 互相关单元以计算出的位置值为中心形成具有一定范围的窗口，并计算窗口内的互相关值。 互相关值累积单元累积互相关值。 第二最大值位置计算单元计算累积互相关值中具有最大值的互相关值的位置。
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公开(公告)号：KR1020080030132A
公开(公告)日：2008-04-04
申请号：KR1020060095785
申请日：2006-09-29
Applicant: 한국전자통신연구원
IPC: H04L27/26 , H04B1/7073
CPC classification number: H04L27/2647
Abstract: An apparatus and a method for advanced GCL(Generalized Chirp-Like) sequence detection in a wireless communication system are provided to effectively detect a GCL sequence by using a size and a code of a real number except for an imaginary number of IDFT(Inverse Discrete Fourier Transform) output. An apparatus for advanced GCL sequence detection in a wireless communication system includes an I/FDFT(Inverse/Forward Discrete Fourier Transform) processing unit(24), a real number detection unit, and a maximum value detection unit(26). The I/FDFT processing unit reverses an order of a differential coded GCL sequence and performs I/FDFT processing. The real number detection unit selects a real number part from output of the I/FDFT processing unit. The maximum detection unit detects a maximum value with a plus code from the real number part detected from the real number detection unit.
Abstract translation: 提供了一种用于无线通信系统中的高级GCL（广义啁啾状）序列检测的装置和方法，以通过使用除IDFT的虚数以外的实数的大小和码来有效地检测GCL序列（逆离散 傅里叶变换）输出。 一种用于无线通信系统中的高级GCL序列检测装置，包括：I / FDFT（逆/前向离散傅立叶变换）处理单元（24），实数检测单元和最大值检测单元（26）。 I / FDFT处理单元反转差分编码GCL序列的顺序并进行I / FDFT处理。 实数检测单元从I / FDFT处理单元的输出中选择实数部分。 最大检测单元利用来自实数检测单元检测到的实数部分的正码来检测最大值。
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公开(公告)号：KR1020060025350A
公开(公告)日：2006-03-21
申请号：KR1020040074111
申请日：2004-09-16
Applicant: 한국전자통신연구원
CPC classification number: H03M13/3753 , H03M13/09 , H03M13/11 , H03M13/6502
Abstract: 본 발명은 송신기로부터 수신되는 부호화된 데이터를 적어도 한 번 이상 반복 복호하는 복호기에서의 반복 복호 중지 방법 및 그 장치에 관한 것이다.
본 발명에서는, 복호기가 반복 복호를 수행하는 동시에, 반복 복호의 결과 값을 순차적으로 입력 받아 정보 비트열 단위로 CRC(Cyclic Redundancy Check)를 수행한다. 그 결과, 에러가 없으면 반복 복호를 중지시키거나, 에러가 있으면 반복 복호를 다시 수행하도록 한다. 이때, 송신기로부터 수신된 데이터는 부호화 블록 단위로 CRC 코드가 포함된 데이터로서, LDPC(Low-Density Parity-Check) 부호 또는 터보(Turbo) 부호처럼 반복 복호를 수행해야 하는 부호로 부호화된 데이터이다.
이를 통하여, 평균적인 반복 복호 수행 회수를 줄임으로써, 시스템 전체의 파워 소모량을 줄이고 복호 지연 시간도 상당히 줄일 수 있다.
복호기, LCPC 부호, 터보 부호, CRC, 복호 지연 및 파워 소모량 감소-
公开(公告)号：KR1020040055079A
公开(公告)日：2004-06-26
申请号：KR1020020081669
申请日：2002-12-20
Applicant: 한국전자통신연구원
IPC: H03M13/41
CPC classification number: H03M13/41 , H03M13/6569
Abstract: PURPOSE: A Viterbi decoding method and a recording medium for storing the same are provided to prevent errors and reduce FER(Frame Error Rate) by reducing errors of an end part in a decoding process. CONSTITUTION: A Viterbi decoder extends an input signal as much as arbitrary length, k from a starting stage of the input signal to an ending point of the input signal. The extended signal is decoded by the Viterbi decoder. The data are erased as much as the extended length from the ending point of the decoded signal. The input signal of the Viterbi decoder are formed with the encoded signal of frame units. A relation between the length of the extended signal, k and a size of one frame, F is expressed by 0
Abstract translation: 目的：提供维特比解码方法和用于存储维特比解码方法和记录介质，以通过减少解码处理中的结束部分的错误来防止错误并降低FER（帧错误率）。 构成：维特比解码器将输入信号从输入信号的起始阶段到输入信号的终点扩展为任意长度k。 扩展信号由维特比解码器解码。 从解码信号的终点起，数据被擦除的扩展长度一样多。 维特比解码器的输入信号由帧单元的编码信号形成。 扩展信号的长度k与一帧的大小之间的关系F由0
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