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公开(公告)号:JPS5878255A
公开(公告)日:1983-05-11
申请号:JP17569281
申请日:1981-11-04
Applicant: HITACHI LTD
Inventor: ABE SHIGEO , BANDOU TADAAKI , HIRASAWA KOUTAROU , IDE TOSHIYUKI
IPC: G06F17/14 , G06F15/332
Abstract: PURPOSE:To stabilize the operation of the device, by providing a buffer between a pipeline multiplier and a pipeline adder and storing the multiplication result in the buffer temporarily and executing the addition after the disturbance disappears in the pipeline processing of the adder. CONSTITUTION:A buffer due to a 2-port register 2 is provided between a multistage pipeline multiplier 1 and a multistage pipeline adder 5 to constitute a butterfly operator 100. A selector 3 is provided between the output of the register 2 and the adder 5, and a register 4 is connected between the output of the adder 5 and the selector 3. This operator 100 is used in a high-speed Fourier transform operating device, and one data is written in one machine cycle by the register 2, and the selector 3 and etc. are used to read two data simultaneously. The output from the multiplier 1 is written in the register 2 temporarily, and the output of the register 2 is inputted to the adder 5 simultaneously, thus stabilizing the operation of the operating device.
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公开(公告)号:JPS5852162A
公开(公告)日:1983-03-28
申请号:JP14616781
申请日:1981-09-18
Applicant: HITACHI LTD
Inventor: KUZUNUKI SOUSHIROU , HIRASAWA KOUTAROU , KUROSAWA KENICHI , KANEKO TAKASHI
IPC: B66B1/18
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公开(公告)号:JPS57199765A
公开(公告)日:1982-12-07
申请号:JP8306381
申请日:1981-05-29
Applicant: HITACHI LTD
Inventor: KUZUNUKI SOUSHIROU , HIRASAWA KOUTAROU , YONEDA KENJI , KANEKO TAKASHI
IPC: B66B1/06
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公开(公告)号:JPS56132273A
公开(公告)日:1981-10-16
申请号:JP14300980
申请日:1980-10-15
Applicant: HITACHI LTD
Inventor: IWASAKA TATSUO , HIRASAWA KOUTAROU , KAWAMOTO YUKIO
IPC: B66B1/18
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公开(公告)号:JPS5675354A
公开(公告)日:1981-06-22
申请号:JP15120179
申请日:1979-11-21
Applicant: HITACHI LTD
Inventor: KUZUNUKI SOUSHIROU , HIRASAWA KOUTAROU , IMAI MASUMI , SAKATA KAZUHIRO , YONEDA KENJI
IPC: B66B1/06
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公开(公告)号:JPS5652374A
公开(公告)日:1981-05-11
申请号:JP13437680
申请日:1980-09-29
Applicant: HITACHI LTD
Inventor: KANEKO TAKASHI , IWASAKA TATSUO , HIRASAWA KOUTAROU , KUZUNUKI SOUSHIROU
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公开(公告)号:JPS5623527A
公开(公告)日:1981-03-05
申请号:JP9735579
申请日:1979-08-01
Applicant: HITACHI LTD
Inventor: IMAI MASUMI , HIRASAWA KOUTAROU
Abstract: PURPOSE:To facilitate cut-in or draw-out of a program to or from an entire system by establishing a group of programs independently of each other so that a cut-in or draw-out of a program will not affect the entire system. CONSTITUTION:A multiprogram, which is designed to control two or more engines, is provided with execution priorities and engine start cycles which are dependent on the number of start requests for cut-in to a digital controller is then computed by this system and, when the number for a program reaches a start cycle, a flag for execution is memorized by that program. Execution is finally made for a program having the highest priority.
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公开(公告)号:JPS5612276A
公开(公告)日:1981-02-06
申请号:JP8815279
申请日:1979-07-13
Applicant: HITACHI LTD , HITACHI ENG CO LTD
Inventor: KUZUNUKI SOUSHIROU , HIRASAWA KOUTAROU , IMAI MASUMI , KANEKO TAKASHI , SHIOIRI YOSHITAKA
IPC: B66B1/18
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公开(公告)号:JPS55156170A
公开(公告)日:1980-12-04
申请号:JP6038279
申请日:1979-05-18
Applicant: HITACHI LTD , HITACHI ENG CO LTD
Inventor: KUZUNUKI SOUSHIROU , HIRASAWA KOUTAROU , IMAI MASUMI , SAKATA KAZUHIRO , YONEDA KENJI , SHIOIRI YOSHITAKA
IPC: B66B3/00
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公开(公告)号:JPS55101565A
公开(公告)日:1980-08-02
申请号:JP824179
申请日:1979-01-29
Applicant: HITACHI LTD , HITACHI ENG CO LTD
Inventor: SHIOIRI YOSHITAKA , HIRASAWA KOUTAROU , KUZUNUKI SOUSHIROU , YONEDA KENJI
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