公开(公告)号：SG11201402088PA

公开(公告)日：2014-06-27

申请号：SG11201402088P

申请日：2012-11-13

Applicant: IBM

Inventor： CARLOUGH STEVEN ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GAINEY CHARLES JR ,  MITRAN MARCEL ,  COPELAND REID

IPC: G06F9/30

Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.

公开(公告)号：AU2012360180A1

公开(公告)日：2014-06-05

申请号：AU2012360180

申请日：2012-11-13

Applicant: IBM

Inventor： CARLOUGH STEVEN ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES ,  MITRAN MARCEL ,  COPELAND REID

IPC: G06F9/30

Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.

公开(公告)号：CA2675635A1

公开(公告)日：2008-08-07

申请号：CA2675635

申请日：2008-01-22

Applicant: IBM

Inventor： COPELAND REID ,  DOYLE PATRICK ,  HALL CHARLES ,  JOHNSON ANDREW ,  SHEIKH ALI

IPC: G06F9/318 ,  G06F9/455

Abstract: Emulation of source machine instructions is provided in which target mach ine CPU condition codes are employed to produce emulated condition code sett ings without the use, encoding or generation of branching instructions.