Abstract:
PROBLEM TO BE SOLVED: To provide a novel bipolar transistor with high dynamic performances, usable in an integrated circuit. SOLUTION: The bipolar transistor comprises a monocrystalline silicon emitter region with a thickness smaller than 50nm. The base of the bipolar transistor is made of an SiGe alloy. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a system for controlling access between a main processor and a peripheral device which are connected through a communication bus with excellent security. SOLUTION: At least one token selectively permitting access to one or a plurality of peripheral devices is assigned to all or a part of programs executes by the main processor. The token is provided by an auxiliary processor which uses a memory different from the main processor at least at an early stage. Existence of a permission token for access to the related peripheral device is checked for each request for one access of the program to one of the peripheral devices. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a normalized noise flow having a fixed output rate. SOLUTION: A method and a circuit for normalizing a noise source providing an initial bit flow conditions the state of an output bit to the respective states of the bits of the initial flow examined by words of identical lengths and further conditions the state of a current output bit to the state of at least one previous output bit upon occurrence of a word of bits of identical states. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a coupler with distributed lines of which the directionality is improved. SOLUTION: A distributed coupler comprising a first conductive line carrying a main signal between two end terminals, a second conductive line coupled to the first conductive line and carrying a sample signal proportional to the main signal between two end terminals, and two capacitors connected respectively to the two terminals of both lines. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a method for evaluating the definition of an eye iris or the like. SOLUTION: The method and a system for evaluating the definition of the eye iris or the like consist of approximately localizing the pupil in an image, defining, from the approximate position of the pupil, an examination window centered on this position, and applying a gradient accumulation operation to the luminance values of the pixels of the examination window, the running total being proportional to the definition score of the image. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To propose the rules capable of optimizing the display of a picture at a selected speed in conformity with the specifications of a series data stream processing from the extraction of data from a hard disk to the display of the data. SOLUTION: In a method of decoding and displaying a picture coded in conformity with MPEG standards at a logical speed of ×N in a forward direction mode, a decoding rule and a display rule based on designated threshold values (N1, N2, N3 and N4) is applied, corresponding to the values of picture delay to be displayed for logical pictures designated by display performed at the logical speed. COPYRIGHT: (C)2004,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To determinate such a fact that a memory cell is written to either state, even when a memory cell is written to either state after its manufacture. SOLUTION: A memory cell 1 comprises at least two detectable states including one unprogrammed state, and at least a first branch in series between two read voltage applying terminals 4, 5. The cell further comprises front-end reading stages 6, 7 provided with two changeable resistors in parallel which has different resistances with a first predetermined difference, poly silicon writing resistors Rp1, Rp2, and a writing stage which can be accessed by a writing circuit where the terminals of the writing resistors can cause the irreversible reduction of the values. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a method for transmitting data between two nodes of an orthogonal frequency-division multiplexing network. SOLUTION: This method assigns to each node at least one transmission frequency set and one reception frequency set, the transmission set of each node is different from its own reception set and the method uses each node as a relay for transmitting back a transmission which is not intended for it. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a method for transmitting a digital data message through an output terminal 22 of a monitor circuit 18 integrated by a microprocessor 12, wherein the message represents a determined event that occurs when the microprocessor executes an instruction and to provide a device for transmitting the digital data message. SOLUTION: The method has a step of transmitting a correlation message including an identifier of a specific digital data message and counters, the number of which is the number of instructions to be executed by the microprocessor 12 between an instruction related to the transmission of the specific digital data message and an instruction related to the transmission of the preceding digital data message before or after transmitting at least one specific digital data message related to a specific event. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To allow manufacturing of a hybrid substrate, especially manufacturing of C-MOS structure to be simplified. SOLUTION: The method related to this invention forms primary and secondary active regions (1a, 1b, 1c and 14a, 14b) on a front face of a support material, wherein the active regions are respectively formed with primary and secondary single-crystal semiconductor materials having different, but preferably the same crystal structures. Further, the method gives a benefit that the front sides of the primary and secondary active regions (1a, 1b, 1c and 14a, 14b) are in the same plane. Especially, such a method forms the secondary active regions (14a and 14b) through a step to crystallize the secondary single-crystal semiconductor material from a pattern composed of the secondary polycrystal and/or amorphous semiconductor materials as well as an interface region between the pattern and the preselected primary active regions (1a and 1b). The support material is formed of lamination of a substrate (4) and an electric insulation layer (3), wherein the front side of the electric insulation layer (3) corresponds to the front side of the support material. COPYRIGHT: (C)2007,JPO&INPIT