Abstract:
A package system includes at least one active circuitry disposed over a substrate. A passivation structure is disposed over the at least one active circuitry. The passivation structure has at least one opening that is configured to expose at least one first electrical pad. At least one passive electrical component is disposed over the passivation structure. The at least one passive electrical component is electrically coupled with the at least one first electrical pad.
Abstract:
A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.
Abstract:
This disclosure relates to a semiconductor device including resistor arrangement including a first resistor electrically connected to a ground voltage and a second resistor in direct physical contact with the first resistor. The second resistor is configured to receive a temperature independent current and the second resistor has thermal properties similar to those of the first resistor. This disclosure also relates to a semiconductor device including a load configured to receive an operating voltage and a voltage source configured to supply the operating voltage. The semiconductor device further includes a resistor arrangement between the load and the voltage source. This disclosure also relates to a method of using a resistor arrangement to calculate an operating current.
Abstract:
A circuit including an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a noise shaper. The noise shaper is configured to truncate the digital output and generate a noise shaper output having a lower number of bits than the digital output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC). The PWM DAC configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output.
Abstract:
A ratio meter includes a converter circuit, a first counter, a delay circuit, and a second counter. The converter circuit is configured to receive a temperature-independent signal, to convert the received temperature-independent signal into a first frequency signal during a first phase, to receive a temperature-dependent signal, and to convert the temperature-dependent signal into a second frequency signal during a second phase. The first counter is configured to receive the first frequency signal and to generate a control signal by counting a predetermined number of pulses of the first frequency signal count. The delay circuit is configured to delay the control signal for a predetermined time delay. The second counter is configured to receive the second frequency signal and to generate a count value by counting the second frequency signal.
Abstract:
A regulator control circuit includes a high side driver that is configured to receive a supply voltage. A capacitor is configured to store charges. A first transistor is coupled between the capacitor at a first node and a gate of a high side driver at a second node. The first node is capable of being boosted to a voltage to operate the first transistor at a saturation mode for a charge sharing between the first node and the second node so as to substantially turn on the high side driver.
Abstract:
A digital controlled battery charger comprises a power converter, a voltage sensor, a current senor, a mode selector and a digital controller. The voltage sensor and current sensor detect the voltage of a rechargeable battery and the current flowing through the rechargeable battery respectively. The mode selector selects a feedback signal from either the output of the voltage sensor or the output of the current sensor. The digital controller receives the selected feedback signal and generates a pulse width modulated signal for the power converter. Additionally, the digital controller is capable of dynamically adjusting its coefficients so that the control loop can maintain a stable system when the battery charger operates in different battery charging phases.
Abstract:
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.
Abstract:
An apparatus for controlling slew rate is coupled to two adjustable voltage rails. The output of the apparatus is coupled to the gate of a switching element. By employing two adjustable voltage rails, the slew rate of the switching element is proportional to the voltage difference between the first adjustable rail and the second adjustable rail. The slew rate control apparatus can be applied to a variety of switching elements including N channel Field Effect Transistors (NFETs), P channel Field Effect Transistors (PFETs), current mode logic circuits and level shifter circuits.
Abstract:
An integrated circuit includes a high side driver and a low side driver. The low side driver is electrically coupled with the high side driver. A circuit is electrically coupled with the high side driver and a first node between the high side driver and the low side driver. The circuit is configured to substantially turn off the high side driver if the high side driver leaves a cutoff region of the high side driver during a tri-state mode.