METHOD, APPARATUS, RECEIVER, COMPUTER PROGRAM AND STORAGE MEDIUM FOR JOINT DETECTION
    61.
    发明公开
    METHOD, APPARATUS, RECEIVER, COMPUTER PROGRAM AND STORAGE MEDIUM FOR JOINT DETECTION 有权
    方法,设备,接收机,计算机程序和存储设备的联合检测

    公开(公告)号:EP2767115A1

    公开(公告)日:2014-08-20

    申请号:EP11873911.9

    申请日:2011-10-14

    CPC classification number: H04B1/12 H04B1/7105 H04B1/7107 H04B2001/71077

    Abstract: The present invention relates a method, apparatus, receiver, computer program for joint detection. In the method, it is firstly determined if whether a number of original active codes is beyond a predefined threshold or not, and when the number of the original active codes is beyond the predefined threshold and a strong interference code exists in the active codes corresponding to intra-frequency adjacent cells, it is to apply an interference cancellation to a receive signal, cancel MAI caused by a strong interference signal corresponding to the strong interference code, and perform a joint detection by utilizing a matched filtering result of a remaining signal after the interference cancellation for the joint detection. According to at least one embodiment of the present invention, when there is large interference in the intra-frequency adjacent cells and the number of the active codes is beyond a maximum threshold, the joint detection performance is improved.

    A HIGH EFFICIENCY POWER AMPLIFIER
    62.
    发明公开
    A HIGH EFFICIENCY POWER AMPLIFIER 审中-公开
    LEISTUNGSVERSTÄRKER麻省理工学院WIRKUNGSGRAD

    公开(公告)号:EP2740213A1

    公开(公告)日:2014-06-11

    申请号:EP12743933.9

    申请日:2012-07-17

    Abstract: A matching unit (200) configured to match a load of an amplifier circuit to an external circuit. The matching unit (200) comprises a first reactance configured to generate a first positive reactance at low frequencies and a second positive reactance at high frequencies. A second reactance unit comprises at least one series capacitor (C s ) and at least one series inductor (L s ) serially coupled between a resistor (R L ) and the first and second outputs of the amplifier. The second reactance unit is configured to generate a negative reactance at low frequencies and a third positive reactance at high frequencies; and a third reactance unit configured to generate a short at high frequencies so as to reduce a parasitic capacitance at the first and second outputs of the amplifier at high frequencies, wherein said first, second, and third reactance units are configured to operate together to provide a generally constant impedance across a wideband frequency range.

    Abstract translation: 配置单元(200),被配置为将放大器电路的负载与外部电路相匹配。 匹配单元(200)包括被配置为在低频率处产生第一正电抗的第一电抗和在高频处产生第二正电抗。 第二电抗单元包括至少一个串联电容器(C s)和串联耦合在电阻器(R L)与放大器的第一和第二输出端之间的至少一个串联电感器(L s)。 第二电抗单元被配置为在低频处产生负电抗,并在高频下产生第三正电抗; 以及第三电抗单元,其被配置为在高频下产生短路,以便降低放大器在高频下的第一和第二输出端的寄生电容,其中所述第一,第二和第三电抗单元被配置为一起操作以提供 在宽带频率范围内通常是恒定的阻抗。

    CONTROL OF DIGITAL VOLTAGE AND FREQUENCY SCALING OPERATING POINTS
    64.
    发明公开
    CONTROL OF DIGITAL VOLTAGE AND FREQUENCY SCALING OPERATING POINTS 审中-公开
    控制数字调整电压和频率工作点

    公开(公告)号:EP2715938A1

    公开(公告)日:2014-04-09

    申请号:EP12719761.4

    申请日:2012-05-11

    Abstract: A clock signal for electronic circuitry is generated by generating, based on which one of a plurality of application use cases is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points. Based on the electronic circuitry's present speed requirement, a second signal is generated that indicates a second selected one of the clock signal operating points. For any given one of the application use cases, the speed requirement need not remain constant for the duration of the application use case. Based on whichever one of the first and second signals is associated with a higher clock frequency operating point, a third signal is generated that indicates which clock signal operating point (and possibly what voltage level) should be active. The third signal controls generation of a clock (and possibly also voltage level).

    A high efficiency power amplifier
    65.
    发明公开
    A high efficiency power amplifier 有权
    高效率功率放大器

    公开(公告)号:EP2854288A3

    公开(公告)日:2015-04-29

    申请号:EP14191308.7

    申请日:2012-07-17

    Abstract: A matching unit (200) configured to match a load of an amplifier circuit to an external circuit. The matching unit (200) comprises a first reactance configured to generate a first positive reactance at low frequencies and a second positive reactance at high frequencies. A second reactance unit comprises at least one series capacitor (C s ) and at least one series inductor (L s ) serially coupled between a resistor (R L ) and the first and second outputs of the amplifier. The second reactance unit is configured to generate a negative reactance at low frequencies and a third positive reactance at high frequencies; and a third reactance unit configured to generate a short at high frequencies so as to reduce a parasitic capacitance at the first and second outputs of the amplifier at high frequencies, wherein said first, second, and third reactance units are configured to operate together to provide a generally constant impedance across a wideband frequency range.

    Abstract translation: 匹配单元(200),被配置为将放大器电路的负载匹配到外部电路。 匹配单元(200)包括被配置为产生低频下的第一正电抗和高频下的第二正电抗的第一电抗。 第二电抗单元包括串联耦合在电阻器(RL)与放大器的第一和第二输出端之间的至少一个串联电容器(Cs)和至少一个串联电感器(Ls)。 第二电抗单元被配置为产生低频负电抗和高频第三正电抗; 以及第三电抗单元,所述第三电抗单元被配置为在高频下产生短路以便以高频率减小放大器的第一和第二输出处的寄生电容,其中所述第一,第二和第三电抗单元被配置为一起操作以提供 宽带频率范围内的阻抗通常恒定。

    MIMO CONFIGURATION METHODS AND APPARATUS
    66.
    发明公开
    MIMO CONFIGURATION METHODS AND APPARATUS 有权
    MIMO-KONFIGURATIONSVERFAHREN UND -VORRICHTUNG

    公开(公告)号:EP2834924A1

    公开(公告)日:2015-02-11

    申请号:EP13715199.9

    申请日:2013-04-05

    Abstract: Multiple-input multiple-output (MIMO) with multiple power amplifiers and antennas in a mobile transmitter, such as a user equipment for a cellular telephone communication system, has such great impacts on the transmitter's battery life, form factor, and complexity that it should not be used unless its benefits clearly outweigh its costs. Methods and apparatus enable the benefits of MIMO by beam-forming and antenna-switching to be obtained without incurring the drawbacks of increased current consumption due to multiple power amplifiers.

    Abstract translation: 移动发射机中多个功率放大器和天线的多输入多输出(MIMO),如用于蜂窝电话通信系统的用户设备,对发射机的电池寿命,外形尺寸和复杂度有很大的影响 不得使用,除非其利益明显超过其成本。 方法和装置可以通过波束成形和天线切换获得MIMO的优点,而不会产生由于多个功率放大器引起的增加的电流消耗的缺点。

    A method for controlling powering of a mobile platform
    67.
    发明公开
    A method for controlling powering of a mobile platform 审中-公开
    Verfahren zur Steuerung des Antriebs einer mobilen Plattform

    公开(公告)号:EP2811367A1

    公开(公告)日:2014-12-10

    申请号:EP13170348.0

    申请日:2013-06-04

    Abstract: A method for controlling powering of a mobile platform is provided. The platform comprises at least two Power Management Units PMUs. The method comprises synchronizing of the at least two Power Management Units PMUs, whereby a selected start up time will remain constant. Further, a mobile platform comprising at least two Power Management Units PMUs for controlling power in the mobile platform is provided. The platform comprises means for synchronizing of the said at least two Power Management Units PMUs, whereby a selected start up time will remain constant.

    Abstract translation: 提供了一种用于控制移动平台的供电的方法。 该平台包括至少两个电源管理单元PMU。 该方法包括同步至少两个电源管理单元PMU,由此所选择的启动时间将保持恒定。 此外,提供了包括用于控制移动平台中的电力的至少两个电源管理单元PMU的移动平台。 平台包括用于同步所述至少两个电源管理单元PMU的装置,由此所选择的启动时间将保持恒定。

    METHOD, APPARATUS, RECEIVER, COMPUTER PROGRAM AND STORAGE MEDIUM FOR JOINT DETECTION
    69.
    发明公开
    METHOD, APPARATUS, RECEIVER, COMPUTER PROGRAM AND STORAGE MEDIUM FOR JOINT DETECTION 审中-公开
    方法,设备,接收机,计算机程序和存储设备共同ERKENNUG

    公开(公告)号:EP2761765A1

    公开(公告)日:2014-08-06

    申请号:EP11873358.3

    申请日:2011-09-28

    CPC classification number: H04B1/7105 H04B2201/709763

    Abstract: The present invention relates to a method, an apparatus, a receiver, a computer program and a storage medium for joint detection. The method comprises: adjusting a ranking order of codes in a matched filtering result and a ranking order of column vectors in a system submatrix according to the power, performing the joint detection using an adjusted matched filtering result and an adjusted system submatrix, and acquiring demodulated signals corresponding to the codes. The codes having high power will be demodulated firstly, thus it ensures accuracy of demodulation, inhibits erroneous propagation effect and improves accuracy of the joint detection.

    DYNAMIC POWER SCALING OF AN INTERMEDIATE SYMBOL BUFFER ASSOCIATED WITH COVARIANCE COMPUTATIONS
    70.
    发明公开
    DYNAMIC POWER SCALING OF AN INTERMEDIATE SYMBOL BUFFER ASSOCIATED WITH COVARIANCE COMPUTATIONS 有权
    DYNAMISCHE LEISTUNGSSKALIERUNG EINES ZWISCHENSYMBOLPUFFERS IM ZUSAMMENHANG MIT KOVARIANZBERECHNUNGEN

    公开(公告)号:EP2745411A1

    公开(公告)日:2014-06-25

    申请号:EP12766419.1

    申请日:2012-09-21

    CPC classification number: H04B1/7115 H04B2001/70935 H04B2201/709727

    Abstract: An intermediate symbol buffer (ISB) configuration and method is provided such that the ISB memory comprises 15 portions, one for each HSDPA spreading code. Symbols associated with a spreading code are written to the memory portion associated with the same spreading code. When a covariance calculation is performed to obtain a more accurate channel estimate, only the symbols associated with spreading codes determined to be needed for the covariance calculation are written to the ISB by a buffer block and red from the ISB by a correlation core. The symbols associated with spreading codes that are not necessary for a covariance calculation may be masked from being written or read from the ISB. In some embodiments each memory portion is an individual memory block. In other embodiments a plurality of memory blocks may contain a plurality of memory portions, one memory partition designated, at least temporarily, or each spreading code.

    Abstract translation: 提供中间符号缓冲器(ISB)配置和方法,使得ISB存储器包括15个部分,每个HSDPA扩展码一个。 与扩展码相关联的符号被写入与相同扩展码相关联的存储器部分。 当执行协方差计算以获得更准确的信道估计时,只有与确定为协方差计算所需的扩展码相关联的符号才被缓冲块写入ISB,并通过相关核心从ISB写入红色。 与协方差计算所不需要的扩展码相关联的符号可以被掩蔽从ISB的写入或读取。 在一些实施例中,每个存储器部分是单个存储器块。 在其他实施例中,多个存储器块可以包含多个存储器部分,至少临时地为每个扩展码指定一个存储器分区。

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