公开(公告)号：US20110068326A1

公开(公告)日：2011-03-24

申请号：US12957146

申请日：2010-11-30

Applicant: Moon-Gyu Jang ,  Yark-Yeon Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Tae-Youb Kim ,  Seong-Jae Lee

Inventor： Moon-Gyu Jang ,  Yark-Yeon Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Tae-Youb Kim ,  Seong-Jae Lee

IPC: H01L29/78

CPC classification number: H01L29/8126 ,  H01L29/66409

Abstract: A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate exposed on both sides of the gate electrode.

Abstract translation: 肖特基势垒隧道晶体管包括栅极电极和源极和漏极区域。 栅电极形成在衬底的沟道区上，以与衬底形成肖特基结。 源极和漏极区域形成在暴露于栅电极两侧的衬底中。

公开(公告)号：US07745316B2

公开(公告)日：2010-06-29

申请号：US11930902

申请日：2007-10-31

Applicant: Yark-Yeon Kim ,  Seong-Jae Lee ,  Moon-Gyu Jang ,  Tae-Youb Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Byoung-Chul Park

Inventor： Yark-Yeon Kim ,  Seong-Jae Lee ,  Moon-Gyu Jang ,  Tae-Youb Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Byoung-Chul Park

IPC: H01L21/28 ,  H01L21/44

CPC classification number: H01L29/78618 ,  H01L29/7839

Abstract: Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.

Abstract translation: 提供一种用于制造肖特基势垒隧道晶体管（SBTT）的方法，其可以从根本上防止由栅极电极的两个侧壁上形成的间隔物的损坏引起的栅极漏电流的产生。 一种制造肖特基势垒隧道晶体管的方法，包括：a）在由支撑衬底支撑的掩埋氧化物层上形成硅图案和牺牲图案; b）在暴露于硅图案的两侧的掩埋氧化物层上形成源极/漏极区域，源极/漏极区域由金属层形成并与硅图案的两个侧壁接触; c）去除牺牲图案以暴露硅图案的顶表面; 以及d）在暴露的硅图案上形成栅极绝缘层和栅电极。

公开(公告)号：US20100013030A1

公开(公告)日：2010-01-21

申请号：US12443376

申请日：2007-08-30

Applicant: Han-Young Yu ,  An-Soon Kim ,  Chil-Seong Ah ,  Jong-Heon Yang ,  In-Bok Baek ,  Chang-Geun Ahn ,  Seong-Jae Lee ,  Jin-Ho Yun

Inventor： Han-Young Yu ,  An-Soon Kim ,  Chil-Seong Ah ,  Jong-Heon Yang ,  In-Bok Baek ,  Chang-Geun Ahn ,  Seong-Jae Lee ,  Jin-Ho Yun

IPC: H01L29/66 ,  H01L21/30

CPC classification number: G01N33/54366 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0645 ,  B01L2300/0887

Abstract: Provided is a biosensor with a three-dimensional multi-layered structure, a method for manufacturing the biosensor, and a biosensing apparatus including the biosensor. The biosensing apparatus includes: a chamber having an inlet through which a fluid containing a biomaterial enters and an outlet through which the fluid exits; and a plurality of biosensors inserted and fixed in the chamber. Each biosensor includes: a support unit having a fluid channel through which a fluid containing a biomaterial flows; and a sensing unit disposed on the support unit in such a way that the sensing unit is exposed three-dimensionally in the fluid channel of the support unit, the sensing unit being surface-treated with a reactive material that is to react with the biomaterial flowing through the fluid channel.

Abstract translation: 本发明提供具有三维多层结构的生物传感器，生物传感器的制造方法以及包括生物传感器的生物传感装置。 所述生物传感装置包括：具有入口的腔室，含有生物材料的流体通过所述入口进入，所述流体通过所述出口流出; 以及插入并固定在所述室中的多个生物传感器。 每个生物传感器包括：具有流体通道的支撑单元，含有生物材料的流体通过该流体通道流动; 以及感测单元，其以这样的方式设置在所述支撑单元上，使得所述感测单元在所述支撑单元的流体通道中三维地暴露，所述感测单元用反应性材料进行表面处理，所述反应性材料与所述生物材料流动 通过流体通道。

公开(公告)号：US07605065B2

公开(公告)日：2009-10-20

申请号：US11839704

申请日：2007-08-16

Applicant: Moon Gyu Jang ,  Yark Yeon Kim ,  Jae Heon Shin ,  Seong Jae Lee

Inventor： Moon Gyu Jang ,  Yark Yeon Kim ,  Jae Heon Shin ,  Seong Jae Lee

IPC: H01L21/28 ,  H01L21/44

CPC classification number: H01L29/7613 ,  B82Y10/00 ,  H01L29/872

Abstract: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).

Abstract translation: 提供了一种肖特基势垒隧道单电子晶体管及其制造方法，其替代传统的制造方法，而是用硅化物替代源极和漏极作为硅和金属的反应物，从而形成金属和半导体之间形成的肖特基势垒 单电子晶体管（SET），其通过注入掺杂剂而包括源极和漏极区域，使得在沟道区域中形成人造量子点。 结果，不需要传统的PADOX工艺来形成单电子晶体管（SET）的量子点，隧道势垒的高度和宽度可以通过使用具有各种肖特基结屏障的硅化物材料进行人工调整，而且 可以提高单电子晶体管（SET）的电流驱动能力。

公开(公告)号：US20090230953A1

公开(公告)日：2009-09-17

申请号：US12403992

申请日：2009-03-13

Applicant: Seong-Jae Lee

Inventor： Seong-Jae Lee

IPC: G01R33/025 ,  G01L3/10

CPC classification number: G01L3/102 ,  G01R33/07

Abstract: The present invention involves a method and apparatus for canceling the effects of magnetic field noise in a torque sensor by placing three sets of magnetic field sensors around a shaft, the first set of field sensors being placed in the central region of the shaft and the second and third sets of field sensors being placed on the right side and left side of the field sensors placed at the central region, respectively. A torque-induced magnetic field is not cancelled with this arrangement of field sensors but a magnetic near field from a near field source is cancelled.

Abstract translation: 本发明涉及一种用于通过将三组磁场传感器放置在轴周围来消除扭矩传感器中的磁场噪声的影响的方法和装置，第一组场传感器被放置在轴的中心区域中，而第二组 并且第三组场传感器分别放置在放置在中心区域的场传感器的右侧和左侧。 通过这种现场传感器的布置，扭矩感应磁场不被抵消，而来自近场源的磁场近场被取消。

公开(公告)号：US07566642B2

公开(公告)日：2009-07-28

申请号：US11188076

申请日：2005-07-22

Applicant: Yark Yeon Kim ,  Moon Gyu Jang ,  Jae Heon Shin ,  Seong Jae Lee

Inventor： Yark Yeon Kim ,  Moon Gyu Jang ,  Jae Heon Shin ,  Seong Jae Lee

IPC: H01L21/44

CPC classification number: H01L29/665 ,  H01L21/2252 ,  H01L21/2254 ,  H01L21/28518 ,  H01L21/28537 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7839

Abstract: An n-type SBTT and a manufacturing method thereof are provided. The SBTT includes a silicon layer, a gate, a double layer that has a rare-earth metal silicide layer and a transition metal silicide layer. The silicon layer has a channel region. The gate is formed in an overlapping manner on the channel region and has a gate dielectric layer on its interface with respect to the silicon layer. The double layer is formed as a source/drain that has the channel region interposed on the silicon layer.

Abstract translation: 提供了n型SBTT及其制造方法。 SBTT包括硅层，栅极，具有稀土金属硅化物层和过渡金属硅化物层的双层。 硅层具有沟道区。 栅极以重叠的方式形成在沟道区上，并且在其相对于硅层的界面上具有栅极介电层。 双层形成为具有介于硅层之间的沟道区的源极/漏极。

公开(公告)号：US07539119B2

公开(公告)日：2009-05-26

申请号：US11296935

申请日：2005-12-07

Applicant: Jong Hyurk Park ,  Seong Jae Lee

Inventor： Jong Hyurk Park ,  Seong Jae Lee

IPC: G11B7/00

CPC classification number: G11B9/04

Abstract: Provided is a data storage apparatus using current switching in a metal oxide layer. The data storage apparatus includes a substrate; a lower electrode layer disposed on the substrate; a metal oxide layer disposed on the lower electrode layer; a probe tip disposed on the metal oxide layer opposite the lower electrode layer and for scanning a local region of the metal oxide layer in units of nanometer, wherein the probe tip applies a write voltage to the local region of the metal oxide layer so that the resistance of the local region is sharply changed until a resistive state of the local region is switched from a first state to a second state or measures current flowing through the local region according to the resistive state and reads data stored in the local region; a driver for transferring the position of the probe tip to the local region of the metal oxide layer; and a controller for controlling the probe tip and the driver.

Abstract translation: 提供了一种在金属氧化物层中使用电流切换的数据存储装置。 数据存储装置包括：基板; 设置在所述基板上的下电极层; 设置在下电极层上的金属氧化物层; 探针尖端，设置在与下电极层相对的金属氧化物层上，用于以纳米单位扫描金属氧化物层的局部区域，其中探针尖端向金属氧化物层的局部区域施加写入电压，使得 局部区域的电阻急剧变化，直到局部区域的电阻状态从第一状态切换到第二状态，或根据电阻状态测量流过局部区域的电流，并读取存储在局部区域中的数据; 用于将探针头的位置转移到金属氧化物层的局部区域的驱动器; 以及用于控制探针尖端和驾驶员的控制器。

公开(公告)号：US07537883B2

公开(公告)日：2009-05-26

申请号：US11447820

申请日：2006-06-06

Applicant: Han Young Yu ,  In Bok Baek ,  Chang Geun Ahn ,  Ki Ju Im ,  Jong Heon Yang ,  Ung Hwan Pi ,  Min Ki Ryu ,  Chan Woo Park ,  Sung Yool Choi ,  Seong Jae Lee

Inventor： Han Young Yu ,  In Bok Baek ,  Chang Geun Ahn ,  Ki Ju Im ,  Jong Heon Yang ,  Ung Hwan Pi ,  Min Ki Ryu ,  Chan Woo Park ,  Sung Yool Choi ,  Seong Jae Lee

IPC: G03F7/00 ,  H01L51/40 ,  C25D5/18

CPC classification number: H01L51/105 ,  B82Y10/00 ,  H01L51/0023 ,  H01L51/0595

Abstract: Provided is a method of manufacturing a nano size-gap electrode device. The method includes the steps of: disposing a floated nano structure on a semiconductor layer; forming a mask layer having at least one opening pattern to intersect the nano structure; and depositing a metal on the semiconductor layer exposed through the opening pattern to form an electrode, such that a nano size-gap is provided under the nano structure by the nano structure.

Abstract translation: 提供一种制造纳米尺寸间隙电极器件的方法。 该方法包括以下步骤：在半导体层上设置漂浮的纳米结构; 形成具有至少一个开口图案以与纳米结构相交的掩模层; 以及在通过所述开口图案暴露的所述半导体层上沉积金属以形成电极，使得通过所述纳米结构在所述纳米结构下方提供纳米尺寸间隙。

公开(公告)号：US20070152791A1

公开(公告)日：2007-07-05

申请号：US11306571

申请日：2006-01-03

Applicant: Seong-Jae Lee ,  Dennis O'Neel

Inventor： Seong-Jae Lee ,  Dennis O'Neel

IPC: H01F7/02

CPC classification number: B03C1/288 ,  B03C2201/18

Abstract: A magnetic array having a collar with a plurality of magnets mounted to the inner surface of the collar. The magnets are positioned in a spaced alignment around the collar with all having the same polarity facing toward the center of the collar. Shielding is used to control and/or contain the direction of the magnetic force and the array is covered with a plastic coating.

Abstract translation: 一种磁性阵列，其具有安装在所述轴环的内表面上的多个磁体的轴环。 磁体以围绕套环的间隔对齐的方式定位，其全部具有面向轴环中心的相同极性。 屏蔽用于控制和/或包含磁力的方向，并且阵列被塑料涂层覆盖。

公开(公告)号：US07098092B2

公开(公告)日：2006-08-29

申请号：US10691852

申请日：2003-10-22

Applicant: Tae Woong Kang ,  Seong Jae Lee

Inventor： Tae Woong Kang ,  Seong Jae Lee

IPC: H01L21/84

CPC classification number: B82Y10/00 ,  H01L29/66439 ,  H01L29/7613

Abstract: Disclosed is to a single electron device, a method of manufacturing the same, and a method of simultaneously manufacturing a single electron device and an MOS transistor. Accordingly, the single electron device of the present invention comprises, on a substrate, semiconductor layers in which a source region and a drain region spaced a predetermined distance apart are formed, hemisphere-type silicon layer formed between the semiconductor layers as an active layer, the hemisphere-type silicon layer having a plurality of electron islands, a gate insulating layer formed on a top surface of the entire structure, and a gate electrode formed on the gate insulating layer in order to apply voltage to the active layer.

Abstract translation: 公开了单电子器件及其制造方法，以及同时制造单电子器件和MOS晶体管的方法。 因此，本发明的单电子器件在衬底上包括形成间隔开预定距离的源区和漏区的半导体层，形成在作为有源层的半导体层之间的半球型硅层， 具有多个电子岛的半球型硅层，形成在整个结构的顶表面上的栅极绝缘层，以及形成在栅极绝缘层上的栅电极，以向该有源层施加电压。