公开(公告)号：WO2006006084A3

公开(公告)日：2006-07-20

申请号：PCT/IB2005003169

申请日：2005-07-06

Applicant: SONY COMPUTER ENTERTAINMENT INC ,  IBM

Inventor： DAY MICHAEL NORMAN ,  JOHNS CHARLES RAY ,  LIU PEICHUN PETER ,  TRUONG THUONG QUANG ,  YAMAZAKI TAKESHI

IPC: G06F13/28

CPC classification number: G06F13/28

Abstract: A method, an apparatus, and a computer program are provided for controlling memory access. Direct Memory Access (DMA) units have become commonplace in a number of bus architectures. However, managing limited system resources has become a challenge with multiple DMA units. In order to mange the multitude of commands generated and preserve dependencies, embedded flags in commands or a barrier command are used. These operations then can control the order in which commands are executed so as to preserve dependencies.

Abstract translation: 提供了一种用于控制存储器访问的方法，装置和计算机程序。 直接存储器访问（DMA）单元在许多总线体系结构中已经司空见惯。 但是，管理有限的系统资源已成为多个DMA单元的挑战。 为了管理生成的大量命令并保留依赖关系，可以使用命令中的嵌入标志或屏障命令。 这些操作可以控制执行命令的顺序，从而保持依赖关系。

公开(公告)号：WO2006038718A3

公开(公告)日：2006-07-13

申请号：PCT/JP2005018738

申请日：2005-10-05

Applicant: SONY COMPUTER ENTERTAINMENT INC

Inventor： IWATA EIJI

IPC: G06F9/308 ,  G06F9/312 ,  G06F9/315

CPC classification number: G06F9/30018 ,  G06F9/30032 ,  G06F9/30043 ,  G06F9/3816 ,  G06F9/3824

Abstract: A bit manipulation processor, system and method are provided which reduces the number of operations performed during data processing. An additional register is used as a buffer. The buffer has a bit length which is preferably greater than the address boundaries in a memory or register address. A bitstream can be processed using the buffer by itself or in combination with a standard register, depending upon the particular function to be implemented.

Abstract translation: 提供了一种位操作处理器，系统和方法，其减少了数据处理期间执行的操作次数。 一个附加寄存器用作缓冲区。 缓冲器的位长度优选地大于存储器或寄存器地址中的地址边界。 根据要实现的特定功能，可以使用缓冲器本身或与标准寄存器组合来处理比特流。

公开(公告)号：WO2006038714A3

公开(公告)日：2006-06-29

申请号：PCT/JP2005018733

申请日：2005-10-05

Applicant: SONY COMPUTER ENTERTAINMENT INC ,  SUZUOKI MASAKAZU ,  YAMAZAKI TAKESHI

Inventor： SUZUOKI MASAKAZU ,  YAMAZAKI TAKESHI

IPC: G06F1/32 ,  G06F1/26 ,  G06F12/00

CPC classification number: G06F1/206 ,  G06F1/3203 ,  G06F1/3243 ,  G06F9/30145 ,  G06F9/30167 ,  Y02D10/152 ,  Y02D10/16

Abstract: A processor element (PE) includes a processing unit (PU) and a number of attached processing units (APUs). The instruction set of each APU is divided a priori into a number of types, each type associated with a different amount of heat generation. Each APU keeps track of the amount of each type of instruction executed over a time period, - the power information, - and provides this power information to the PU. The PU then performs power management as a function of the provided power information from each APU, - such as directing a particular APU to enter an idle state to reduce power consumption.

Abstract translation: 处理器元件（PE）包括处理单元（PU）和多个附加处理单元（APU）。 每个APU的指令集先验分成多种类型，每种类型与不同的热量产生量相关联。 每个APU记录一段时间内执行的每种类型的指令的数量， - 功率信息，并将该功率信息提供给PU。 然后PU根据来自每个APU提供的功率信息来执行功率管理，例如引导特定的APU进入空闲状态以降低功耗。

公开(公告)号：WO2006018932A8

公开(公告)日：2006-04-20

申请号：PCT/JP2005011976

申请日：2005-06-29

Applicant: SONY COMPUTER ENTERTAINMENT INC ,  SONY CORP ,  KAKUMU TATSUYA ,  FUJINAMI YASUSHI ,  HAMADA TOSHIYA ,  OHSHIMA TAKENORI ,  IHARA KOJI ,  UEDA AKIHIKO ,  UTSUMI SHUSUKE

Inventor： KAKUMU TATSUYA ,  FUJINAMI YASUSHI ,  HAMADA TOSHIYA ,  OHSHIMA TAKENORI ,  IHARA KOJI ,  UEDA AKIHIKO ,  UTSUMI SHUSUKE

IPC: H04N5/93 ,  G11B20/10

CPC classification number: G11B27/105 ,  G11B20/10 ,  G11B27/322 ,  H04N5/85 ,  H04N9/8205

Abstract: In a video reproducing device for reproducing contents recorded in a disc and the like, user operation control is easily performed. A video reproducing device (100) selects a plurality of video streams previously stored in a disc and reproduces them. A reproduction control part (206) is configured to reproduce the video stream in one of two reproducing modes, which are a normal mode wherein a specific key input relating to video reproduction is accepted and a menu mode wherein the specific key input is not accepted. The mode for reproducing the video stream can be written in a script file recorded in the disc by a contents creator.

Abstract translation: 在用于再现记录在盘等中的内容的视频再现装置中，可以容易地进行用户操作控制。 视频再现装置（100）选择先前存储在盘中的多个视频流并再现它们。 再现控制部（206）被配置为以两种再现模式之一再现视频流，这两种再现模式是正常模式，其中接收与视频再现有关的特定键输入以及不接受特定键输入的菜单模式。 用于再现视频流的模式可以由内容创建者写入记录在盘中的脚本文件。

公开(公告)号：WO2006038717A2

公开(公告)日：2006-04-13

申请号：PCT/JP2005/018737

申请日：2005-10-05

Applicant: SONY COMPUTER ENTERTAINMENT INC. ,  SUZUOKI, Masakazu ,  YAMAZAKI, Takeshi

Inventor： SUZUOKI, Masakazu ,  YAMAZAKI, Takeshi

IPC: G06F13/42

CPC classification number: G06F12/1425 ,  G06F12/0815 ,  G06F12/1483 ,  G06F13/42

Abstract: A system configuration includes a processing element (PE), an input/output (I/O) interface device and a shared memory. The PE further includes at least one processing unit (PU) and one, or more, attached processing units (APUs). At least one of the APUs performs an I/O function by reading data from, and writing data to, an external device coupled to the I/O interface device. Data is exchanged between the APU and the I/O interface device via the shared memory using a data level synchronization mechanism.

Abstract translation: 系统配置包括处理元件（PE），输入/输出（I / O）接口设备和共享存储器。 PE还包括至少一个处理单元（PU）和一个或多个附接的处理单元（APU）。 至少一个APU通过从耦合到I / O接口设备的外部设备读取数据和向其写入数据来执行I / O功能。 使用数据级同步机制，通过共享存储器在APU和I / O接口设备之间交换数据。

公开(公告)号：WO2006035989A3

公开(公告)日：2006-04-06

申请号：PCT/JP2005/018383

申请日：2005-09-28

Applicant: SONY COMPUTER ENTERTAINMENT INC.

Inventor： INOUE, Keisuke ,  IWATA, Eiji

IPC: G06F15/80 ,  G06F13/16

Abstract: The present invention provides methods and apparatus for transferring and storing data among processors and memory in a multiprocessor system. The data is compressed locally before it is sent to a shared memory. The memory stores the data in its compressed state, but the data is aligned in the memory in the same manner as uncompressed data would be. A tag table keeps track of the compression type and compressed data size for a set of data at a given address block. A data compressor and a data expander may be implemented in a direct memory access controller accessible to multiple coprocessors, or the compressor and the expander may be implemented within the coprocessors.

公开(公告)号：WO2006035989A2

公开(公告)日：2006-04-06

申请号：PCT/JP2005018383

申请日：2005-09-28

Applicant: SONY COMPUTER ENTERTAINMENT INC

Inventor： INOUE KEISUKE ,  IWATA EIJI

IPC: G06F15/80 ,  G06F13/16

CPC classification number: G06F13/28 ,  G06F15/167

Abstract: The present invention provides methods and apparatus for transferring and storing data among processors and memory in a multiprocessor system. The data is compressed locally before it is sent to a shared memory. The memory stores the data in its compressed state, but the data is aligned in the memory in the same manner as uncompressed data would be. A tag table keeps track of the compression type and compressed data size for a set of data at a given address block. A data compressor and a data expander may be implemented in a direct memory access controller accessible to multiple coprocessors, or the compressor and the expander may be implemented within the coprocessors.

Abstract translation: 本发明提供了用于在多处理器系统中在处理器和存储器之间传送和存储数据的方法和装置。 数据在发送到共享内存之前在本地进行压缩。 存储器将数据存储在其压缩状态，但数据以与未压缩数据相同的方式存储在存储器中。 标签表跟踪给定地址块上的一组数据的压缩类型和压缩数据大小。 数据压缩器和数据扩展器可以在可由多个协处理器访问的直接存储器访问控制器中实现，或者压缩器和扩展器可以在协处理器内实现。

公开(公告)号：WO2006031509A3

公开(公告)日：2006-03-23

申请号：PCT/US2005/031701

申请日：2005-09-01

Applicant: SONY COMPUTER ENTERTAINMENT INC. ,  HEIRICH, Alan

Inventor： HEIRICH, Alan

IPC: G06F11/36

Abstract: A method for graphically navigating within a debugger program that enables examination of processing by components of a computing system is provided. In this method, a display of the components is generated that enables navigation to debugging windows of the components. The display and navigation methods may reflect a taxonomic organization of the components with hierarchical and peer relationships. The components are represented by graphical icons that may be selectable. If a selection of a component is detected, a debugging window for the selected component is generated, whereby the debugging window is configured to display a state of processes being handled by the component during execution of code for a program. Graphic user interfaces and a system for navigating within a debugger program also are described.

公开(公告)号：WO2005101316A8

公开(公告)日：2006-03-16

申请号：PCT/JP2005002111

申请日：2005-02-07

Applicant: SONY COMPUTER ENTERTAINMENT INC

Inventor： SASAKI NOBUO ,  KOGUCHI TAKAHIRO

IPC: G06T11/00 ,  G06T15/00 ,  G06T15/20

CPC classification number: G06T15/04 ,  G06T11/001

Abstract: A texture unit is provided for performing texture mapping. A computation unit provides a separation unit with a texel value of a texture given by an index form. The separation unit takes an index value and an alpha value separately out of the texel value in the index form, and provides the index value to a lookup table reference unit and the alpha value to a synthesizing unit. Referring to a lookup table, the lookup table reference unit obtains an RGB value corresponding to the index value and provides the RGB value to the synthesizing unit. The synthesizing unit attaches the alpha value to the RGB value so as to generate color information of the texel and provides the color information to the computation unit. The computation unit performs a filtering processing such as bi-linear interpolation on the texture data based on the color information of the texel.

Abstract translation: 提供纹理单元用于执行纹理映射。 计算单元提供具有由索引形式给出的纹理的纹素值的分离单元。 分离单元以索引形式从标量值中分离出索引值和α值，并将索引值提供给查找表参考单元，并将α值提供给合成单元。 参考查找表，查找表参考单元获得与索引值对应的RGB值，并将RGB值提供给合成单元。 合成单元将α值附加到RGB值，以便生成纹素的颜色信息，并将颜色信息提供给计算单元。 计算单元基于纹素的颜色信息对纹理数据执行诸如双线性插值的滤波处理。

公开(公告)号：WO2006006613A1

公开(公告)日：2006-01-19

申请号：PCT/JP2005/012881

申请日：2005-07-06

Applicant: SONY COMPUTER ENTERTAINMENT INC.

Inventor： OSAWA, Masaki

IPC: G06F9/38

CPC classification number: G06F9/3844 ,  G06F9/30181 ,  G06F9/30189 ,  G06F9/3802

Abstract: Methods and apparatus are provided for enhanced instruction handling in processing environments. If branch misprediction occurs during instruction processing, a branch history table may be updated based upon the number of instructions to be fetched. The branch history table may be updated in accordance with a first mode if at least two instructions are available, and may be updated in accordance with a second mode if less than two instructions are available. A compiler can assist the processing by aligning instructions for processing. The instructions can be aligned across multiple instruction fetch groups so that instructions are available for fetching and the branch history table is updated prior to performing a branching operation.

Abstract translation: 为处理环境中的指令处理提供了方法和装置。 如果在指令处理期间发生分支错误预测，则可以基于要获取的指令的数量来更新分支历史表。 如果至少两个指令可用，则可以根据第一模式来更新分支历史表，并且如果少于两个指令可用，则可以根据第二模式更新分支历史表。 编译器可以通过对齐处理指令来协助处理。 指令可以在多个指令获取组中对齐，以便指令可用于提取，并且在执行分支操作之前更新分支历史表。