公开(公告)号：US20100316452A1

公开(公告)日：2010-12-16

申请号：US12860724

申请日：2010-08-20

Applicant: Takuya ISHIDA

Inventor： Takuya ISHIDA

IPC: B23C5/20 ,  B23B27/22

CPC classification number: B23C5/06 ,  B23C5/202 ,  B23C2200/085 ,  B23C2200/125 ,  B23C2200/128 ,  B23C2200/205 ,  B23C2200/323 ,  B23C2210/0442 ,  B23C2210/325 ,  B23C2210/66 ,  Y10T407/1906 ,  Y10T407/191 ,  Y10T407/22 ,  Y10T407/23 ,  Y10T407/235

Abstract: A throwaway insert enabling the use of a holder for a long period and having excellent chip evacuation is provided. The throwaway insert is formed in a substantially polygonal plate shape and includes a rake face formed on an upper surface thereof, a relief face formed on a side surface thereof, a main cutting edge formed along a ridge representing an intersection of the rake face and the relief face, which is divided into a plurality of main cutting edge divisions by at least one groove formed on the relief face, and a projection formed so as to protrude from the rake face in correspondence with each of the main cutting edge divisions.

Abstract translation: 提供了能够长期使用保持器并且具有优异的排屑的一次性插入件。 一次性插入件形成为大致多边形的板状，并且包括形成在其上表面上的前刀面，形成在其侧表面上的凸起面，沿着表示前刀面和 所述凸面由形成在所述浮雕面上的至少一个槽分割为多个主切削刃分割部，以及与所述主切削刃分割对应地形成为从所述前刀面突出的突起。

公开(公告)号：US20100092253A1

公开(公告)日：2010-04-15

申请号：US12597706

申请日：2008-04-25

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: B23C5/20 ,  B23C5/00

CPC classification number: B23C5/202 ,  B23C5/06 ,  B23C2200/128 ,  B23C2200/205 ,  B23C2200/206 ,  B23C2200/208

Abstract: The present invention is a cutting insert, comprising an upper surface, a lower surface, a side surface, a cutting edge, and a groove portion. The cutting edge comprises a main cutting edge, an auxiliary cutting edge arranged so as to make an obtuse angle to the main cutting edge in the upper surface view, and a corner cutting edge positioned between the main cutting edge and the auxiliary cutting edge and is located in at least a part of an intersection portion between the upper surface and the side surface. The groove portion is located on the side surface so as to reach the upper surface. In this cutting insert, a side wall surface of the groove portion positioned on the side near the corner cutting edge is substantially parallel to the auxiliary cutting edge or comes close to the auxiliary cutting edge toward inside of the groove portion in the upper surface view. The present invention is a cutting tool in which this cutting insert is installed and a cutting method using the same.

Abstract translation: 本发明是一种切削刀片，包括上表面，下表面，侧表面，切削刃和凹槽部分。 切削刃包括主切削刃，配置成在上表面视图中与主切削刃成钝角的辅助切削刃和位于主切削刃和辅助切削刃之间的角切削刃，并且是 位于上表面和侧表面之间的交叉部分的至少一部分中。 槽部位于侧面，以到达上表面。 在该切削刀片中，位于靠近角刃的一侧的槽部的侧壁面基本上平行于辅助切削刃，或者在上表面侧朝向槽部的内侧靠近辅助切削刃。 本发明是一种切割工具，其中安装有该切削刀片和使用该切削刀片的切削方法。

公开(公告)号：US07535257B2

公开(公告)日：2009-05-19

申请号：US10934529

申请日：2004-09-07

Applicant: Yukinari Shibata ,  Nobuyuki Saito ,  Tomonaga Hasegawa ,  Takuya Ishida

Inventor： Yukinari Shibata ,  Nobuyuki Saito ,  Tomonaga Hasegawa ,  Takuya Ishida

IPC: H03K19/0175

CPC classification number: H04L25/45 ,  H04L25/0292

Abstract: A receiver circuit includes: a current/voltage conversion circuit which performs a current/voltage conversion based on current which flows through the differential signal lines and outputs voltage signals; a comparator which compares the voltage signals and outputs an output signal; a power-down detection circuit which, when the transmitter circuit transmits a power-down command by current-driving the differential signal lines in a normal transfer mode, detects the transmitted power-down command based on a comparison result from the comparator; and a power-down setting circuit which sets at least one of the current/voltage conversion circuit and the comparator to a power-down mode when the power-down command is detected.

Abstract translation: 接收器电路包括：电流/电压转换电路，其基于流过差分信号线的电流进行电流/电压转换并输出电压信号; 比较器，其比较电压信号并输出​​输出信号; 断电检测电路，当发送电路通过以正常传输模式电流驱动差分信号线来发送掉电命令时，根据比较器的比较结果来检测发送的掉电命令; 以及当检测到掉电命令时将电流/电压转换电路和比较器中的至少一个设置为断电模式的掉电设置电路。

公开(公告)号：US07494302B2

公开(公告)日：2009-02-24

申请号：US11740197

申请日：2007-04-25

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: B23B27/16

CPC classification number: B23B27/141 ,  B23B2200/0428 ,  B23B2200/0476 ,  B23B2200/049 ,  B23B2200/323 ,  Y10T83/9319 ,  Y10T407/23 ,  Y10T407/235 ,  Y10T407/24

Abstract: A throw-away tip of which two principal surfaces each comprises a land surface 5 provided along the periphery thereof, a central surface 7 provided on the inside of the land surface 5, a recess (a chip breaker groove) interposed therebetween, and at least one protrusion 8 that extends from the central surface 7 toward the land surface 5, wherein height of the land surface is made equal to the height of at least the top surface of the protrusion 8 so that at least the top surface of the protrusion of the central surface and the land surface both serve as contact surface.

Abstract translation: 一个丢弃尖端，其两个主表面各自包括沿着其周边设置的台面5，设置在台面5的内侧的中心表面7，插入其间的凹部（断屑槽），并且至少 一个从中心表面7延伸到台肩表面5的凸起8，其中凸台表面的高度至少等于突出部8的顶表面的高度，使得至少顶部表面 中心表面和陆面均用作接触面。

公开(公告)号：US07299389B2

公开(公告)日：2007-11-20

申请号：US10765895

申请日：2004-01-29

Applicant: Haruo Nishida ,  Takuya Ishida

Inventor： Haruo Nishida ,  Takuya Ishida

IPC: G01R31/28 ,  G01R31/26

CPC classification number: G01R31/318536 ,  G01R31/3172 ,  G01R31/318541 ,  G01R31/318572

Abstract: A test circuit comprises a selector SEL1 having a first input to which signals M1OUT from a macro block MB1 are input and a second input to which test input signals TIN1 and TIN2 for a macro block MB2 are input, and a selector SEL2 having a first input to which a signal SQ from the SEL1 is input and a second input to which a signal M2OUT from the MB2 is input. In a first test mode in which the MB1 is tested, the SEL1 outputs the signals M1OUT from the MB1 to a first input of the SEL2, and the SEL2 outputs the signal SQ from the SEL1 to the MB1. In a second test mode in which the MB2 is tested, the SEL1 outputs the test input signals TIN1 and TIN2 for the MB2 to the MB2, and the SEL2 outputs the signals M2OUT from the MB2 as a test output signal TOUT for the MB2.

Abstract translation: 测试电路包括具有从宏块MB1输入信号M 1 OUT的第一输入和输入用于输入宏块MB 2的测试输入信号TIN 1和TIN 2的第二输入的选择器SEL 1，以及 具有输入来自SEL 1的信号SQ的第一输入的选择器SEL 2和从MB 2输入的信号M 2 OUT的第二输入。 在测试MB 1的第一测试模式中，SEL 1将从MB 1的信号M 1 OUT输出到SEL 2的第一输入，并且SEL 2将来自SEL 1的信号SQ输出到MB 1。 在测试MB2的第二测试模式中，SEL1将MB2的测试输入信号TIN 1和TIN 2输出到MB2，并且SEL 2从MB 2输出信号M 2 OUT作为 MB 2的测试输出信号TOUT。

公开(公告)号：US20070201960A1

公开(公告)日：2007-08-30

申请号：US11740197

申请日：2007-04-25

Applicant: Takuya ISHIDA

Inventor： Takuya ISHIDA

IPC: B23P15/28

CPC classification number: B23B27/141 ,  B23B2200/0428 ,  B23B2200/0476 ,  B23B2200/049 ,  B23B2200/323 ,  Y10T83/9319 ,  Y10T407/23 ,  Y10T407/235 ,  Y10T407/24

Abstract: A throw-away tip of which two principal surfaces each comprises a land surface 5 provided along the periphery thereof, a central surface 7 provided on the inside of the land surface 5, a recess (a chip breaker groove) interposed therebetween, and at least one protrusion 8 that extends from the central surface 7 toward the land surface 5, wherein height of the land surface is made equal to the height of at least the top surface of the protrusion 8 so that at least the top surface of the protrusion of the central surface and the land surface both serve as contact surface.

Abstract translation: 一个丢弃尖端，其两个主表面各自包括沿着其周边设置的台面5，设置在台面5的内侧的中心表面7，插入其间的凹部（断屑槽），并且至少 一个从中心表面7延伸到台肩表面5的凸起8，其中凸台表面的高度至少等于突出部8的顶表面的高度，使得至少凸起的顶表面 中心表面和陆面均用作接触面。

公开(公告)号：US20070005847A1

公开(公告)日：2007-01-04

申请号：US11477717

申请日：2006-06-30

Applicant: Kenyou Nagao ,  Takuya Ishida

Inventor： Kenyou Nagao ,  Takuya Ishida

IPC: G06F13/38

CPC classification number: G06F13/4027

Abstract: A data transfer control device includes an ATA device-side I/F, an ATA host-side I/F, a transfer controller, and a processing section which performs emulation processing. The processing section performs the emulation processing including, when the device-side I/F has received a command from an ATA host, issuing a command corresponding to the received command to a ATA device, starting data transfer through a bus ATABUS1, the device-side I/F, the host-side I/F, and a bus ATABUS2 after issuing the command, and, when the host-side I/F has read a status from the ATA device after completion of the data transfer, returning a status corresponding to the read status to the ATA host.

Abstract translation: 数据传输控制装置包括ATA设备侧I / F，ATA主机侧I / F，传送控制器和执行仿真处理的处理部。 处理部执行仿真处理，包括当设备侧I / F从ATA主机接收到命令时，向ATA设备发出与接收到的命令相对应的命令，通过总线ATABUS1开始数据传送， 在发出命令之后，主机侧I / F，主机侧I / F和总线ATABUS2，当主机端I / F在完成数据传送后从ATA设备读取状态时，返回状态 对应于ATA主机的读取状态。

公开(公告)号：US07023653B2

公开(公告)日：2006-04-04

申请号：US11076306

申请日：2005-03-09

Applicant: Seiji Takenaka ,  Takuya Ishida

Inventor： Seiji Takenaka ,  Takuya Ishida

IPC: G11B5/596

CPC classification number: G11B19/20 ,  G11B20/10222 ,  G11B2220/2512

Abstract: A floppy disk apparatus improves power efficiency and quietness by commencing rotation of a stepping motor in a smooth fashion. The floppy disk apparatus includes an interface control circuit that outputs, in accordance with an instruction from a host apparatus, a first step pulse signal, step pulse period signals that indicate the period of the first step pulse signal and that are output before the first step pulse signal and a direction signal, and a floppy disk control circuit that generates a second step pulse signal delayed by a predetermined time from the first step pulse signal in accordance with the step pulse period signal, that generates a first signal that toggles in synchronization with the first step pulse signal and a second signal that toggles in synchronization with the second step pulse signal, and that outputs the first and second signals as control signals in accordance with the direction signal.

Abstract translation: 软盘设备通过以平滑的方式开始步进电机的旋转来提高功率效率和安静性。 该软盘装置包括接口控制电路，其根据来自主机装置的指令输出第一步骤脉冲信号，指示第一步骤脉冲信号的周期并在第一步骤之前输出的步进脉冲周期信号 脉冲信号和方向信号;以及软盘控制电路，其根据步进脉冲周期信号，从第一阶跃脉冲信号产生延迟预定时间的第二步进脉冲信号，该步骤脉冲周期信号产生与第一步骤脉冲信号同步切换的第一信号 所述第一阶跃脉冲信号和与所述第二步进脉冲信号同步地切换的第二信号，并且根据所述方向信号输出所述第一和第二信号作为控制信号。

公开(公告)号：US20060053329A1

公开(公告)日：2006-03-09

申请号：US11264170

申请日：2005-11-02

Applicant: Takuya Ishida ,  Yoshiyuki Kamihara

Inventor： Takuya Ishida ,  Yoshiyuki Kamihara

IPC: G06F1/12

CPC classification number: G06F5/10

Abstract: A data transfer control device including a buffer is provided which includes an EP2 area (a data storage area set to FIFO) and a CSW area (a randomly accessible status storage area), when data and a CSW are allocated as information to be transferred through one end point EP2. When a phase has switched from a USE data phase (data transport) to a status phase (status transport), the information read area is switched from the EP2 area to the CSW area. and IN data to be transferred from the end point EP2 to a host is read from the CSW area. A CSW0 area for success status and a CSW1 area for non-success status are provided, and a status block packet in which is set either success or non-success default information is previously written therein.

Abstract translation: 提供包括缓冲器的数据传送控制装置，当数据和CSW被分配作为要传送的信息时，包括EP 2区域（设置为FIFO的数据存储区域）和CSW区域（随机可访问的状态存储区域） 通过一个端点EP 2.当相位从USE数据相位（数据传输）切换到状态阶段（状态传输）时，信息读取区域从EP 2区域切换到CSW区域。 并且从CSW区域读取从端点EP 2传送到主机的IN数据。 提供了用于成功状态的CSW 0区域和用于非成功状态的CSW 1区域，并且其中设置了成功或非成功默认信息的状态块分组被预先写入其中。

公开(公告)号：US06901465B2

公开(公告)日：2005-05-31

申请号：US10133751

申请日：2002-04-29

Applicant: Yoshiyuki Kamihara ,  Takuya Ishida

Inventor： Yoshiyuki Kamihara ,  Takuya Ishida

IPC: G06F13/28 ,  G06F13/38 ,  G06F13/40 ,  G06F13/00

CPC classification number: G06F13/385 ,  G06F13/28 ,  G06F13/4027

Abstract: A data transfer control device using USB (a first bus), the end of a data phase (data transport: transfer of all the data) during an OUT transaction is determined on condition that data transmission (DMA transfer) through EBUS (a second bus) has ended, and the end of a data phase during an IN transaction is determined on condition that data reception through EBUS has ended and also an Empty signal has gone active, indicating that a data storage area has become empty. A counter that counts the data size is provided on the EBUS side. If data reception through EBUS ends and the size of data remaining in the data storage area is less than the maximum packet size, a short packet in the data storage area is transmitted automatically through USB and an interrupt is used to notify the firmware of the presence of the short packet.

Abstract translation: 在通过EBUS进行数据传输（DMA传送）（第二总线）的条件下，使用USB（第一总线），在OUT事务期间数据相位结束（数据传输：所有数据传输）的数据传输控制装置 ）已经结束，并且在IN事务期间的数据阶段的结束是基于通过EBUS的数据接收已经结束以及空信号已经活动的条件来确定的，指示数据存储区域已经变空。 在EBUS端提供了计数数据大小的计数器。 如果通过EBUS的数据接收结束，并且数据存储区域中剩余的数据的大小小于最大数据包大小，则通过USB自动传输数据存储区域中的一个短数据包，并使用一个中断来通知固件的存在 的短包。