公开(公告)号：US20230203652A1

公开(公告)日：2023-06-29

申请号：US18116609

申请日：2023-03-02

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Karthik Janakiraman ,  Aykut Aydin ,  Diwakar Kedlaya

IPC: C23C16/455 ,  H01J37/32 ,  C23C16/30 ,  C23C16/38

CPC classification number: C23C16/45536 ,  H01J37/32009 ,  C23C16/303 ,  C23C16/38

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

公开(公告)号：US11640905B2

公开(公告)日：2023-05-02

申请号：US17125349

申请日：2020-12-17

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Rui Cheng ,  Karthik Janakiraman

IPC: H01L21/02 ,  C23C16/455

Abstract: Exemplary deposition methods may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. The method may include striking a plasma in the processing region between a faceplate and a pedestal of the semiconductor processing chamber. The pedestal may support a substrate including a patterned photoresist. The method may include maintaining a temperature of the substrate less than or about 200° C. The method may also include depositing a silicon-containing film along the patterned photoresist.

公开(公告)号：US11527408B2

公开(公告)日：2022-12-13

申请号：US16867095

申请日：2020-05-05

Applicant: Applied Materials, Inc.

Inventor： Tzu-shun Yang ,  Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang ,  Diwakar Kedlaya ,  Meenakshi Gupta ,  Srinivas Guggilla ,  Yung-chen Lin ,  Hidetaka Oshio ,  Chao Li ,  Gene Lee

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

公开(公告)号：US11462630B2

公开(公告)日：2022-10-04

申请号：US16640580

申请日：2018-08-28

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Yi Yang ,  Karthik Janakiraman ,  Abhijit Basu Mallick

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78

Abstract: Embodiments described herein generally relate to doping of three dimensional (3D) structures on a substrate. In some embodiments, a conformal dopant containing film may be deposited over the 3D structures. Suitable dopants that may be incorporated in the film include halogen atoms. The film may be subsequently annealed to diffuse the dopants into the 3D structures.

公开(公告)号：US20220170151A1

公开(公告)日：2022-06-02

申请号：US17108583

申请日：2020-12-01

Applicant: Applied Materials, Inc.

Inventor： Gaosheng Fu ,  Tuan A Nguyen ,  Amit Bansal ,  Karthik Janakiraman ,  Juan Carlos Rocha-Alvarez

IPC: C23C16/44 ,  H01L21/67

Abstract: Exemplary semiconductor processing systems include a processing chamber defining a processing region. The semiconductor processing systems may include a foreline coupled with the processing chamber. The foreline may define a fluid conduit. The semiconductor processing systems may include a foreline trap coupled with a distal end of the foreline. The semiconductor processing systems may include a removable insert provided within an interior of the foreline trap. The semiconductor processing systems may include a throttle valve coupled with the foreline trap downstream of the removable insert.

公开(公告)号：US11335555B2

公开(公告)日：2022-05-17

申请号：US17045323

申请日：2019-04-05

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Yi Yang ,  Karthik Janakiraman

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/285 ,  H01L21/324 ,  H01L21/225

Abstract: Methods of conformally doping three dimensional structures are discussed. Some embodiments utilize conformal silicon films deposited on the structures. The silicon films are doped after deposition to comprise halogen atoms. The structures are then annealed to dope the structures with halogen atoms from the doped silicon films.

公开(公告)号：US20220108892A1

公开(公告)日：2022-04-07

申请号：US17063339

申请日：2020-10-05

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Diwakar Kedlaya ,  Zubin Huang ,  Aykut Aydin

IPC: H01L21/033 ,  C23C16/38

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

公开(公告)号：US20210130174A1

公开(公告)日：2021-05-06

申请号：US17081086

申请日：2020-10-27

Applicant: Applied Materials, Inc.

Inventor： Aykut Aydin ,  Krishna Nittala ,  Karthik Janakiraman ,  Yi Yang ,  Gautam K. Hemani

IPC: C01B33/04 ,  C01B35/02

Abstract: Deposition methods may prevent or reduce crystallization of silicon in a deposited amorphous silicon film that may occur after annealing at high temperatures. The crystallization of silicon may be prevented by doping the silicon with an element. The element may be boron, carbon, or phosphorous. Doping above a certain concentration for the element prevents substantial crystallization at high temperatures and for durations at or greater than 30 minutes. Methods and devices are described.

公开(公告)号：US10518418B2

公开(公告)日：2019-12-31

申请号：US15860102

申请日：2018-01-02

Applicant: Applied Materials, Inc.

Inventor： Dale R. Du Bois ,  Juan Carlos Rocha-Alvarez ,  Karthik Janakiraman ,  Hari K. Ponnekanti ,  Sanjeev Baluja ,  Prajeeth Wilton

IPC: H01L21/67 ,  B25J11/00 ,  H01L21/677

Abstract: The present disclosure generally relates to semiconductor process equipment used to transfer semiconductor substrates between process chambers. More specifically, embodiments described herein are related to systems and methods used to transfer, or swap, semiconductor substrates between process chambers using a transport device that employs at least two blades for the concurrent transfer of substrates between processing chambers.

公开(公告)号：US10236197B2

公开(公告)日：2019-03-19

申请号：US14589990

申请日：2015-01-05

Applicant: Applied Materials, Inc.

Inventor： Karthik Janakiraman ,  Abhijit Basu Mallick ,  Hari K. Ponnekanti ,  Mandyam Sriram ,  Alexandros T. Demos ,  Mukund Srinivasan ,  Juan Carlos Rocha-Alvarez ,  Dale R. Dubois

IPC: H01L21/67 ,  C23C16/458 ,  H01L21/687 ,  C23C14/58 ,  C23C14/50 ,  B05C13/00 ,  C23C16/56 ,  H01L21/677

Abstract: An apparatus and method for processing a substrate in a processing system containing a deposition chamber, a treatment chamber, and an isolation region, separating the deposition chamber from the treatment is described herein. The deposition chamber deposits a film on a substrate. The treatment chamber receives the substrate from the deposition chamber and alters the film deposited in the deposition chamber with a film property altering device. Processing systems and methods are provided in accordance with the above embodiment and other embodiments.