公开(公告)号：US10959633B2

公开(公告)日：2021-03-30

申请号：US15837508

申请日：2017-12-11

Applicant: Intel Corporation

Inventor： Amit Baxi ,  Adel Elsherbini ,  Vincent Mageshkumar ,  Sasha Oster ,  Aleksandar Aleksov ,  Feras Eid

IPC: A61B5/0408 ,  A61B5/01 ,  A61B5/026 ,  A61B5/0205 ,  A61B5/021 ,  A61B5/08 ,  A61B5/00

Abstract: Sensing patch systems are disclosed herein. A sensing patch system includes a flexible substrate and a sensor node. The flexible substrate includes one or more substrate sensors configured to provide sensor data, one or more substrate conductors electrically coupled to a corresponding substrate sensor to conduct the sensor data provided by the corresponding substrate sensor, and a node interface. The sensor node includes a substrate interface configured to receive the node interface of the flexible substrate. The sensor node is configured to receive the sensor data provided by the substrate sensors, process the sensor data, and communicate the processed sensor data to a remote device.

公开(公告)号：US10943851B1

公开(公告)日：2021-03-09

申请号：US16706383

申请日：2019-12-06

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Shawna Liff ,  Henning Braunisch ,  Johanna Swan

IPC: H01L23/473 ,  G02B6/122 ,  G02B6/13 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L25/16 ,  H01L25/00 ,  H01L21/48 ,  H05K1/02

Abstract: An integrated circuit device assembly may be formed comprising a reconstituted wafer attached to a base substrate, wherein the base substrate provides thermal management and optical signal routes. In one embodiment, the base substrate may include a plurality of electrical interconnects for electrically coupling integrated circuit devices in the reconstituted wafer. In another embodiment, a plurality of electrical interconnects for electrically coupling integrated circuit devices in the reconstituted wafer may be formed in the reconstituted wafer itself.

公开(公告)号：US20200098669A1

公开(公告)日：2020-03-26

申请号：US16141746

申请日：2018-09-25

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Johanna Swan

IPC: H01L23/473 ,  H01L23/498 ,  H01L21/48 ,  H01L23/427

Abstract: An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and at least one heat transfer fluid conduit extending through the substrate, wherein the heat transfer fluid conduit is electrically attached to the at least one integrated circuit device. In one embodiment, the at least one heat transfer fluid conduit is a power transfer route for the at least one integrated circuit device.

公开(公告)号：US20200005989A1

公开(公告)日：2020-01-02

申请号：US16024593

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Krishna Bharath ,  Adel Elsherbini

IPC: H01F27/28 ,  H01F27/24 ,  H01F41/02 ,  H01F41/04

Abstract: A microelectronics package comprising a package core and an inductor over the package core. The inductor comprises a dielectric over the package core. The dielectric comprises a curved surface opposite the package core. At least one conductive trace is adjacent to the package core. The at least one conductive trace is at least partially embedded within the dielectric and extends over the package core. A magnetic core cladding is over the dielectric layer and at least partially surrounding the conductive trace.

公开(公告)号：US20190038170A1

公开(公告)日：2019-02-07

申请号：US15837508

申请日：2017-12-11

Applicant: Intel Corporation

Inventor： Amit Baxi ,  Adel Elsherbini ,  Vincent Mageshkumar ,  Sasha Oster ,  Aleksandar Aleksov ,  Feras Eid

IPC: A61B5/0408 ,  A61B5/01 ,  A61B5/026 ,  A61B5/00 ,  A61B5/0205

Abstract: Sensing patch systems are disclosed herein. A sensing patch system includes a flexible substrate and a sensor node. The flexible substrate includes one or more substrate sensors configured to provide sensor data, one or more substrate conductors electrically coupled to a corresponding substrate sensor to conduct the sensor data provided by the corresponding substrate sensor, and a node interface. The sensor node includes a substrate interface configured to receive the node interface of the flexible substrate. The sensor node is configured to receive the sensor data provided by the substrate sensors, process the sensor data, and communicate the processed sensor data to a remote device.

公开(公告)号：US09659904B2

公开(公告)日：2017-05-23

申请号：US14104296

申请日：2013-12-12

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Adel Elsherbini

IPC: H01L23/00 ,  H01Q21/00 ,  H01Q21/06 ,  H01Q23/00

CPC classification number: H01Q21/22 ,  G06K19/077 ,  H01L24/20 ,  H01L24/82 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15153 ,  H01L2924/15321 ,  H01Q21/0025 ,  H01Q21/0087 ,  H01Q21/0093 ,  H01Q21/065 ,  H01Q23/00

Abstract: Embodiments described herein generally relate to phased array antenna systems or packages and techniques of making and using the systems and packages. A phased array antenna package may include a distributed phased array antenna comprising (1) a plurality of antenna sub-arrays, which may each include a plurality of antennas, (2) a plurality of Radio Frequency Dies (RFDs), each of the RFDs located proximate and electrically coupled by a trace of a plurality of traces to a corresponding antenna sub-array of the plurality of antenna sub-arrays, and (3) wherein each trace of the plurality of traces configured to electrically couple an antenna of the plurality of antennas to the RFD located proximate the antenna, wherein each trace of the plurality of traces is configured to transmit millimeter wave (mm-wave) radio signals, and wherein the plurality of traces are each of a substantially uniform length.

公开(公告)号：US12300579B2

公开(公告)日：2025-05-13

申请号：US17346895

申请日：2021-06-14

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Qiang Yu ,  Feras Eid ,  Adel Elsherbini ,  Kimin Jun ,  Johanna Swan ,  Shawna Liff

IPC: H01L23/473 ,  H01L23/13 ,  H01L23/538 ,  H01L25/065 ,  H05K7/20 ,  H01L23/00

Abstract: An integrated circuit (IC) package may be fabricated having an interposer, one or more microfluidic channels through the interposer, a first IC chip attached to a first side of the interposer, and a second IC chip attached to a second side of the interposer, where the first side of the interposer includes first bond pads coupled to first bond pads of the first IC chip, and the second side of the interposer includes second bond pads coupled to first bond pads of the second IC chip. In an embodiment of the present description, a liquid cooled three-dimensional IC (3DIC) package may be formed with the IC package, where at least two IC devices may be stacked with a liquid cooled interposer. In a further embodiment, the liquid cooled 3DIC package may be electrically attached to an electronic board. Other embodiments are disclosed and claimed.

公开(公告)号：US12288750B2

公开(公告)日：2025-04-29

申请号：US17485208

申请日：2021-09-24

Applicant: Intel Corporation

Inventor： William J. Lambert ,  Beomseok Choi ,  Krishna Bharath ,  Kaladhar Radhakrishnan ,  Adel Elsherbini

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: In one embodiment, a base die apparatus includes a conformal power delivery structure comprising a first electrically conductive layer defining one or more recesses, and a second electrically conductive layer at least partially within the recesses of the first electrically conductive layer and having a lower surface that generally conforms with the upper surface of the first electrically conductive layer. The conformal power delivery structure also includes a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another. The conformal power delivery structure may be connected to connection pads of the base die apparatus, e.g., to provide power delivery to integrated circuit (IC) chips connected to the base die apparatus. The base die apparatus also includes bridge circuitry to connect IC chips with one another.

公开(公告)号：US20250112210A1

公开(公告)日：2025-04-03

申请号：US18478932

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Han Wui Then ,  Adel Elsherbini ,  Feras Eid ,  Thomas L. Sounart ,  Georgios C. Dogiamis ,  Tushar Kanti Talukdar

IPC: H01L25/065 ,  H01L21/683 ,  H01L21/8238 ,  H01L23/00

Abstract: Methods of selectively transferring integrated circuit (IC) components between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of IC components over the release layer is received, and a second substrate with one or more adhesive areas is received. The layer of IC components may include one or more transistors that contain one or more group III-V materials. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250112208A1

公开(公告)日：2025-04-03

申请号：US18478686

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Kimin Jun ,  Tushar Kanti Talukdar ,  Andrey Vyatskikh ,  Johanna Swan ,  Shawna M. Liff

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/15

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a microelectronic assembly includes a solid glass layer, a plurality of mesa structures on a surface of the glass layer, and an integrated circuit (IC) component on each respective mesa structure. The mesa structures have similar footprints as the IC components, and may be formed on or integrated with the glass layer.