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公开(公告)号:EP3938915A1
公开(公告)日:2022-01-19
申请号:EP20719251.9
申请日:2020-03-14
Applicant: INTEL Corporation
Inventor: APPU, Abhishek R. , KOKER, Altug , ANANTARAMAN, Aravindh , OULD-AHMED-VALL, ElMoustapha , ANDREI, Valentin , GALOPPO VON BORRIES, Nicolas , GEORGE, Varghese , MACPHERSON, Mike , MAIYURAN, Subramaniam , RAY, Joydeep , STRIRAMASSARMA, Lakshminarayanan , JANUS, Scott , INSKO, Brent , RANGANATHAN, Vasanth , SINHA, Kamal , HUNTER, Arthur , SURTI, Prasoonkumar , PUFFER, David , VALERIO, James , SHAH, Ankur N.
IPC: G06F12/0811 , G06F12/0875 , G06F16/27 , G06F12/0866 , G06F16/2453
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公开(公告)号:EP3938894A1
公开(公告)日:2022-01-19
申请号:EP20718902.8
申请日:2020-03-14
Applicant: INTEL Corporation
Inventor: STRIRAMASSARMA, Lakshminarayanan , SURTI, Prasoonkumar , GEORGE, Varghese , ASHBAUGH, Ben , ANANTARAMAN, Aravindh , ANDREI, Valentin , APPU, Abhishek , GALOPPO VON BORRIES, Nicolas , KOKER, Altug , MACPHERSON, Mike , MAIYURAN, Subramaniam , MISTRY, Nilay , OULD-AHMED-VALL, Elmoustapha , PANNEER, Selvakumar , RANGANATHAN, Vasanth , RAY, Joydeep , SHAH, Ankur , TANGRI, Saurabh
IPC: G06F9/38 , G06F12/0862 , G06F9/30
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公开(公告)号:EP3857461A1
公开(公告)日:2021-08-04
申请号:EP19762890.2
申请日:2019-08-21
Applicant: INTEL Corporation
Inventor: DESAI, Kinchit , JAHAGIRDAR, Sanjeev , SURTI, Prasoonkumar , RAY, Joydeep
IPC: G06N3/063 , G06N3/08 , G06F1/3206 , G06F1/3234 , G06N3/04
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公开(公告)号:EP3392828B1
公开(公告)日:2020-03-04
申请号:EP18168630.4
申请日:2018-04-20
Applicant: INTEL Corporation
Inventor: MAIYURAN, Subramaniam M. , LUEH, Guei-Yuan , PAL, Supratim , CHEN, Gang , KOMMARAJU, Ananda V. , CHANDRA, Joy , KOKER, Altug , SURTI, Prasoonkumar , PUFFER, David , LIAO, Hong Bin , RAY, Joydeep , APPU, Abhishek R. , SHAH, Ankur N. , SCHLUESSLER, Travis T. , KENNEDY, Jonathan , BURKE, Devan
IPC: G06T1/20
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75.
公开(公告)号:EP3591519A1
公开(公告)日:2020-01-08
申请号:EP19180125.7
申请日:2019-06-13
Applicant: Intel Corporation
Inventor: APODACA, Michael , SHAH, Ankur , ASHBAUGH, Ben , FLIFLET, Brandon , NALLURI, Hema , K, Pattabhiraman , DOYLE, Peter , KOSTON, Joseph , VALERIO, James , RAMADOSS, Murali , KOKER, Altug , NAVALE, Aditya , SURTI, Prasoonkumar , VEMBU, Balaji
IPC: G06F9/38
Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.
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公开(公告)号:EP3465623A1
公开(公告)日:2019-04-10
申请号:EP17803249.6
申请日:2017-04-30
Applicant: Intel Corporation
Inventor: SEILER, Larry , SURTI, Prasoonkumar , NAVALE, Aditya
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77.
公开(公告)号:EP3396633A1
公开(公告)日:2018-10-31
申请号:EP18168631.2
申请日:2018-04-20
Applicant: INTEL Corporation
Inventor: SURTI, Prasoonkumar , VAIDYANATHAN, Karthik , KUWAHARA, Atsuo , LABBE, Hugues , KP, Sameer , KENNEDY, Jonathan , APPU, Abhishek R. , BOLES, Jeffrey S. , VEMBU, Balaji , APODACA, Michael , GRAJEWSKI, Slawomir , LIKTOR, Gabor , CIMINI, David M. , LAURITZEN, Andrew T. , SCHLUESSLER, Travis T. , RAMADOSS, Murali , VENKATESH, Abhishek , RAY, Joydeep , XIAO, Kai , SHAH, Ankur N. , KOKER, Altug
Abstract: The systems, apparatuses and methods may provide a way to adaptively process and aggressively cull geometry data. Systems, apparatuses and methods may provide for processing, by a positional only shading pipeline (POSH), geometry data including surface triangles for a digital representation of a scene. More particularly, systems, apparatuses and methods may provide a way to identify surface triangles in one or more exclusion zones and non-exclusion zones, and cull surface triangles surface triangles in one or more exclusion zones.
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公开(公告)号:EP3396528A1
公开(公告)日:2018-10-31
申请号:EP18162625.0
申请日:2018-03-19
Applicant: INTEL Corporation
Inventor: KOKER, Altug , APPU, Abhishek R. , SINHA, Kamal , RAY, Joydeep , VEMBU, Balaji , OULD-AHMED-VALL, Elmoustapha , BAGHSORKHI, Sara S. , YAO, Anbang , NEALIS, Kevin , CHEN, Xiaoming , WEAST, John C. , GOTTSCHLICH, Justin E. , SURTI, Prasoonkumar , SAKTHIVEL, Chandrasekaran , AKHBARI, Farshad , SATISH, Nadathur Rajagopalan , MA, Liwei , BOTTLESON, Jeremy , NURVITADHI, Eriko , SCHLUESSLER, Travis T. , SHAH, Ankur N. , KENNEDY, Jonathan , RANGANATHAN, Vasanth , JAHAGIRDAR, Sanjeev
CPC classification number: G06N3/08 , G06F9/505 , G06N3/0445 , G06N3/0454 , G06N3/0481 , G06N3/063 , G06N99/005
Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.
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公开(公告)号:EP3392825A2
公开(公告)日:2018-10-24
申请号:EP18162142.6
申请日:2018-03-15
Applicant: INTEL Corporation
Inventor: SAKTHIVEL, Chandrasekaran , SURTI, Prasoonkumar , WEAST, John C. , BAGHSORKHI, Sara S. , GOTTSCHLICH, Justin E. , APPU, Abhishek R. , GALOPPO VON BORRIES, Nicolas C. , RAY, Joydeep , SRINIVASA, Narayan , CHEN, Feng , ASHBAUGH, Ben J. , BARIK, Rajkishore , LIN, Tsung-Han , SINHA, Kamal , NURVITADHI, Eriko , VEMBU, Balaji , KOKER, Altug
IPC: G06T1/20
CPC classification number: G06F12/0837 , G06F2212/62 , G06N3/08 , G06N99/005 , G06T1/20
Abstract: In an example, an apparatus comprises a plurality of processing unit cores, a plurality of cache memory modules associated with the plurality of processing unit cores, and a machine learning model communicatively coupled to the plurality of processing unit cores, wherein the plurality of cache memory modules share cache coherency data with the machine learning model. Other embodiments are also disclosed and claimed.
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公开(公告)号:EP4453877A1
公开(公告)日:2024-10-30
申请号:EP22912216.3
申请日:2022-10-28
Applicant: INTEL Corporation
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