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公开(公告)号：JPH0580867B2
公开(公告)日：1993-11-10
申请号：JP18093984
申请日：1984-08-30
Applicant: SONY CORP
Inventor： SASE MASATOSHI
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公开(公告)号：JPH0576829B2
公开(公告)日：1993-10-25
申请号：JP18213784
申请日：1984-08-31
Applicant: SONY CORP
Inventor： SASE MASATOSHI
IPC: H04N5/243
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公开(公告)号：JPH0548663B2
公开(公告)日：1993-07-22
申请号：JP17436184
申请日：1984-08-22
Applicant: SONY CORP
Inventor： SASE MASATOSHI
IPC: G11C27/04 , H01L21/339 , H01L27/14 , H01L27/148 , H01L29/76 , H01L29/762 , H01L29/772 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/372 , H04N5/378 , H01L29/796
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公开(公告)号：JPH04175092A
公开(公告)日：1992-06-23
申请号：JP30356890
申请日：1990-11-08
Applicant: SONY CORP
Inventor： SASE MASATOSHI
Abstract: PURPOSE:To obtain a solid state image pickup device with excellent color reproduction characteristics by constructing a basic unit by color filters of eight picture elements composed of two picture elements in the scanning direction and four picture elements in the direction perpendicular to the scanning direction and specifying the arrangement of the basic units. CONSTITUTION:Color filter arrays 10 are formed by combining eight basic picture elements 11 in the X and Y directions. Assuming that any one of the three primary colored filters consisting of a red filter R, a green filter G and a blue filter B is set as a first primary filter (a), either one of the remaining two primary filters is set as a second primary filter (b) and the remaining primary filter is set as a third primary filter (c), the color filter arrays are constructed so that the left four color filters of the basic eight picture elements 11 can be arranged by a color filter (a), a color filter (a), a color filter (a) and a color filter (c) in this order. The right four color filters of the basic eight picture elements 11 are arranged by a color filter (b), a color filter (c), a color filter (b) and a color filter (a) in this order.
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公开(公告)号：JPH03132283A
公开(公告)日：1991-06-05
申请号：JP27077189
申请日：1989-10-18
Applicant: SONY CORP
Inventor： SASE MASATOSHI
Abstract: PURPOSE:To prevent malfunction of a contour correction circuit and to prevent the deterioration in the picture quality by eliminating a modulation component of a filter coded in a zigzag pattern from an image pickup signal and clipping the resulting signal after and before a delay circuit. CONSTITUTION:The camera is provided with a low pass filter circuit 6 eliminating a modulation component of a filter coded in a zigzag pattern from an image pickup signal SS obtained from an image pickup element 2 and delay circuits 7, 9 delaying an output signal SDC 1 of the low pass filter circuit 6 by one horizontal scanning period. Moreover, 1st clip circuits 13, 15 clipping the output signal of the delay circuits 7, 9 and a 2nd clip circuit 11 clipping an output signal SDC of the low pass filter circuit 6 are provided. After the low pass filter circuit 6 eliminates the modulation component of the filter in the zigzag pattern coding, when the resulting signal is clipped before and after the delay circuits 7, 9, the image pickup signal SS is clipped at a lower signal level than the saturated level of the image pickup signal SS to avoid an error between an odd number line and an even number line. Thus, malfunction of the contour correction circuit is prevented to prevent deterioration in the picture quality.
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Patent Agency Ranking
公开(公告)号：JPH03132269A
公开(公告)日：1991-06-05
申请号：JP27077489
申请日：1989-10-18
Applicant: SONY CORP
Inventor： ONGA MAKOTO , SASE MASATOSHI
Abstract: PURPOSE:To realize the adaptive function of a frequency characteristic of a horizontal aperture control luminance signal and a gain loss correction function for a 1H delay circuit with simple constitution by obtaining a difference signal and an average signal between a current scanning line luminance signal and a 1H-preceding scanning line luminance signal. CONSTITUTION:When no error exists between a current scanning line luminance signal YH(k+1) and a one-preceding horizontal period scanning line luminance signal YHk by applying gain adjustment at a gain adjustment circuit 8, a gain loss caused in the one-preceding horizontal period scanning line luminance signal YHk is corrected by a one-preceding horizontal period delay circuit 7. when no error state is attained simultaneously, a horizontal aperture control signal S16 is controlled to a proper state representing a frequency characteristic not giving adverse effect to a modulation chroma signal mutually automatically. Thus the frequency characteristic of the aperture control signal S16 as well as the gain loss correction processing is adjusted.
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公开(公告)号：JPS62133810A
公开(公告)日：1987-06-17
申请号：JP27417685
申请日：1985-12-05
Applicant: SONY CORP
Inventor： SASE MASATOSHI
Abstract: PURPOSE:To obtain a substantially linear relation between an operating current and a gain by providing a couple of diodes supplying a bias current between the 1st differential amplifier and the 2nd differential amplifier using a current mirror as a load. CONSTITUTION:Collectors of transistors (TRs) 21, 22 constituting the 1st differen tial amplifier 20 are connected to a current mirror 24. collectors of the Trs 21, 22 are connected in common via diodes 41, 42 respectively and grounded via a constant current source 43 flowing a constant current 2I0. Collectors of the TRs 21, 22 are connected to bases of Trs 45, 46 constituting the 2nd differen tial amplifier 44 respectively and emitters of the TRs 45, 46 are connected in common and grounded via a constant current source 47 flowing a constant current 2I1. Then an output terminal 46 is used from the collector of the TR 46. Through the constitution above, the voltage gain is substantially proportional to the operating current ratio I1/I0 and controlled over a wide range by changing the current I0.
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公开(公告)号：JPS62125788A
公开(公告)日：1987-06-08
申请号：JP26542785
申请日：1985-11-26
Applicant: SONY CORP
Inventor： SASE MASATOSHI
Abstract: PURPOSE:To lighten a request for a holding characteristic of a peak holding circuit and to obtain a correct white balance by providing a latch circuit between a comparison circuit and a controller and controlling this latch circuit by a gate pulse impressed to a gate circuit for the peak holding circuit. CONSTITUTION:Between the comparison circuits 13, 14 and the controller 17, the latch circuits 21, 22 are respectively disposed and these latch circuits 21, 22 are controlled by the gate pulse from a terminal 12. According to this constitution, the request for the holding characteristic of the peak holding circuits 9-11 may be performed only during a period when the gate circuits 6-8 open a gate and the holding characteristic (leak characteristic) to the peak holding circuits 9-11 is quite softened. Thereby, the freedom for the selection of a design or an element is increased and the correct white balance can be obtained.
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公开(公告)号：JPS62112479A
公开(公告)日：1987-05-23
申请号：JP25340685
申请日：1985-11-11
Applicant: SONY CORP
Inventor： SASE MASATOSHI , KONDOU NORIAKI
IPC: H04N5/202
Abstract: PURPOSE:To attain various I/O characteristics and to easily apply the titled circuit to an integrated circuit by applying a common input voltage signal to plural differential amplifier circuits having different mutual conductance characteristics to the input voltage signal and connecting a common load to the amplifier circuits to obtain an output voltage signal. CONSTITUTION:The input voltage signal vin and collector currents io1-io3 corresponding to mutual conductance values gm1-gm3 are applied to respective differential amplifier circuits 71-73. Since the load RL1 is connected in common to respective circuits 71-73, the sum current iL of respective collector currents io1-io3 is made to flow into the load RL1. Since the current iL flowing into the load RL1 corresponds to the integrated mutual conductance SIGMAgm of respective mutual conductance values gm1-gm3, the output voltage signal Vout also corresponds to the integrated mutual conductance. Thereby, the characteristics of a required output voltage signal vout for the input voltage signal vin can be obtained by selecting the characteristics of the mutual conductance values gm1-gm3 for the input voltage signal vin to the respective circuits 71-73.
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公开(公告)号：JPS61206999A
公开(公告)日：1986-09-13
申请号：JP4598385
申请日：1985-03-08
Applicant: SONY CORP
Inventor： SASE MASATOSHI
Abstract: PURPOSE:To improve a dynamic range and prevent the appearance of the change of an input signal in a hold output signal by making the dynamic range of the signal determined by amplitude of the controlling signal that makes the second transistor conductive or non-conducive. CONSTITUTION:In a sample holding circuit that makes holding action reverse biasing between the emitter base of a sampling transistor 6, input signals are supplied to the base of the first transistor 15 out of the first and second transistors 15 and 16 in which emitters are connected to each other. At the same time, a controlling signal that makes the second transistor 16 non- conductive during sampling and makes the second transistor 16 conductive during holding is supplied to the base of the second transistor 16. Connecting point of respective emitter of the first and second transistors 15 and 16 is connected to the base of the sampling transistor 6. Thus, the dynamic range is determined by amplitude of controlling signals that make the second transistor 16 conductive or non-conductive.
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