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    ETCHING/BONDING CHAMBER FOR ENCAPSULATED DEVICES AND METHOD OF USE
    82.
    发明申请
    ETCHING/BONDING CHAMBER FOR ENCAPSULATED DEVICES AND METHOD OF USE 审中-公开
    用于封装装置的蚀刻/粘合室及其使用方法

    公开(公告)号：WO2009011843A1

    公开(公告)日：2009-01-22

    申请号：PCT/US2008/008632

    申请日：2008-07-15

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  FOSTER, John, S. ,  SUMMERS, Jeffery, F.

    Inventor： FOSTER, John, S. ,  SUMMERS, Jeffery, F.

    IPC: B44C1/22

    CPC classification number: H01L21/67092 ,  B81C1/00285 ,  H01L21/67069 ,  Y10T29/53096

    Abstract: A method for activating a getter at low temperature for encapsulation in a device cavity containing a microdevice comprises etching a passivation layer off the getter material while the device wafer and lid wafer are enclosed in a bonding chamber. A plasma etching process may be used, wherein by applying a large negative voltage to the lid wafer, a plasma is formed in the low pressure environment within the bonding chamber. The plasma then etches the passivation layer from the getter material, which is directly thereafter sealed within the device cavity of the microdevice, all within the etching/bonding chamber.

    Abstract translation: 用于在低温下激活吸气剂以封装在包含微型装置的装置腔中的方法包括在将装置晶片和盖晶片封装在粘结室中时将钝化层从吸气剂材料上蚀刻。 可以使用等离子体蚀刻工艺，其中通过向盖晶片施加大的负电压，在接合室内的低压环境中形成等离子体。 等离子体然后从吸气剂材料中蚀刻钝化层，吸附剂材料直接在密封在微器件的器件腔内，全部在蚀刻/粘合室内。

    CONTACT ELECTRODE FOR MICRODEVICES AND ETCH METHOD OF MANUFACTURE
    85.
    发明申请
    CONTACT ELECTRODE FOR MICRODEVICES AND ETCH METHOD OF MANUFACTURE 审中-公开

    公开(公告)号：WO2008045230A3

    公开(公告)日：2008-04-17

    申请号：PCT/US2007/021113

    申请日：2007-10-02

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  PARANJPYE, Alok ,  THOMPSON, Douglas, L.

    Inventor： PARANJPYE, Alok ,  THOMPSON, Douglas, L.

    IPC: H01L21/00

    Abstract: A contact electrode for a device is made using an etching process to etch the surface of the contact electrode to form a corrugated contact surface wherein the outer edges of at least one grain is recessed from the outer edges of adjecent grains and is recessed by at least about 0.05 μm from the contact plane. By having such a corrugated surface, the contact electrode is likely to contact another conductor with at least one pure metal grain. This etching treatment reduces contact resistance and contact resistance variability throughout many cycles of use of the contact electrode.

    INTERCONNECT STRUCTURE USING THROUGH WAFER VIAS AND METHOD OF FABRICATION
    86.
    发明申请
    INTERCONNECT STRUCTURE USING THROUGH WAFER VIAS AND METHOD OF FABRICATION 审中-公开

    公开(公告)号：WO2008042304A3

    公开(公告)日：2008-04-10

    申请号：PCT/US2007/021014

    申请日：2007-10-01

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  FOSTER, John, S. ,  HOVEY, Steven, H. ,  RUBEL, Paul, J. ,  RYBNICEK, Kimon

    Inventor： FOSTER, John, S. ,  HOVEY, Steven, H. ,  RUBEL, Paul, J. ,  RYBNICEK, Kimon

    IPC: H01L21/44 ,  H01L23/52

    Abstract: A device and a method are described which hermetically seals at least one microstructure within a cavity. Electrical access to the at least one microstructure is provided by through wafer vias formed through a via substrate which supports the at least one microstructure on its front side. The via substrate and a lid wafer may form a hermetic cavity which encloses the at least one microstructure. The through wafer vias are connected to bond pads located outside the cavity by an interconnect structure formed on the back side of the via substrate. Because they are outside the cavity, the bond pads may be placed inside the perimeter of the bond line forming the cavity, thereby greatly reducing the area occupied by the device. The through wafer vias also shorten the circuit length between the microstructure and the interconnect, thus improving heat transfer and signal loss in the device.

    INTERCONNECT STRUCTURE USING THROUGH WAFER VIAS AND METHOD OF FABRICATION
    87.
    发明申请
    INTERCONNECT STRUCTURE USING THROUGH WAFER VIAS AND METHOD OF FABRICATION 审中-公开
    采用晶圆VIAS的互连结构及制造方法

    公开(公告)号：WO2008042304A2

    公开(公告)日：2008-04-10

    申请号：PCT/US2007021014

    申请日：2007-10-01

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  FOSTER JOHN S ,  HOVEY STEVEN H ,  RUBEL PAUL J ,  RYBNICEK KIMON

    Inventor： FOSTER JOHN S ,  HOVEY STEVEN H ,  RUBEL PAUL J ,  RYBNICEK KIMON

    IPC: H01L29/06 ,  H01L21/30

    CPC classification number: B81B7/007 ,  B81B2201/014 ,  B81B2207/092

    Abstract: A device and a method are described which hermetically seals at least one microstructure within a cavity. Electrical access to the at least one microstructure is provided by through wafer vias formed through a via substrate which supports the at least one microstructure on its front side. The via substrate and a lid wafer may form a hermetic cavity which encloses the at least one microstructure. The through wafer vias are connected to bond pads located outside the cavity by an interconnect structure formed on the back side of the via substrate. Because they are outside the cavity, the bond pads may be placed inside the perimeter of the bond line forming the cavity, thereby greatly reducing the area occupied by the device. The through wafer vias also shorten the circuit length between the microstructure and the interconnect, thus improving heat transfer and signal loss in the device.

    Abstract translation: 描述了一种装置和方法，其密封腔体内的至少一个微结构。 至少一个微结构的电通路由穿过通孔衬底形成的穿透晶片通孔提供，该通孔衬底在其前侧支撑至少一个微结构。 通孔基板和盖晶片可以形成封闭至少一个微结构的气密空腔。 贯通晶片通孔通过形成在通孔衬底的背侧上的互连结构连接到位于空腔外部的接合焊盘。 因为它们在空腔外部，所以可以将键合焊盘放置在形成空腔的键合线的周边内，由此大大减小了器件占用的面积。 晶圆通孔还缩短了微结构和互连之间的电路长度，从而改善了器件中的传热和信号损耗。

    SYSTEM AND METHOD FOR PROVIDING ACCESS TO AN ENCAPSULATED DEVICE
    88.
    发明申请
    SYSTEM AND METHOD FOR PROVIDING ACCESS TO AN ENCAPSULATED DEVICE 审中-公开
    用于提供访问封装设备的系统和方法

    公开(公告)号：WO2007136581A1

    公开(公告)日：2007-11-29

    申请号：PCT/US2007/011415

    申请日：2007-05-11

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  ERLACH, David, M. ,  CARLSON, Gregory, A. ,  THOMPSON, Douglas, L.

    Inventor： ERLACH, David, M. ,  CARLSON, Gregory, A. ,  THOMPSON, Douglas, L.

    IPC: H01L21/00

    CPC classification number: B81C99/004

    Abstract: A method for providing access to a feature on a device wafer, and located outside an encapsulation region is described. The method includes forming a cavity in the lid wafer, aligning the lid wafer with the device wafer so that the cavity is located substantially above the feature, and removing material substantially uniformly from the bottom surface of the lid wafer, until an aperture is formed at the cavity, over the feature on the device wafer. By removing material from the lid wafer in a substantially uniform manner, difficulties with the prior art procedure of saw cutting, such as alignment and debris generation, are avoided.

    Abstract translation: 描述了一种用于提供对设备晶片上的特征的访问并位于封装区域外部的方法。 该方法包括在盖晶片中形成空腔，将盖晶片与器件晶片对准，使得空腔基本上位于特征上方，并且从盖晶片的底表面基本均匀地移除材料，直到孔形成在 在器件晶圆上的特征之上。 通过以大致均匀的方式从盖晶片去除材料，避免了现有技术的锯切过程（例如对准和碎屑产生）的困难。

    MEMS DEVICE USING NIMN ALLOY AND METHOD OF MANUFACTURE
    89.
    发明申请
    MEMS DEVICE USING NIMN ALLOY AND METHOD OF MANUFACTURE 审中-公开
    使用NIMN合金的MEMS器件及其制造方法

    公开(公告)号：WO2007111861A2

    公开(公告)日：2007-10-04

    申请号：PCT/US2007006751

    申请日：2007-03-19

    Applicant: INNOVATIVE MICRO TECHNOLOGY ,  CARLSON GREGORY A ,  FOSTER JOHN S ,  LIU DONALD C ,  THOMPSON DOUGLAS L

    Inventor： CARLSON GREGORY A ,  FOSTER JOHN S ,  LIU DONALD C ,  THOMPSON DOUGLAS L

    IPC: H01L29/82

    CPC classification number: H01H1/0036 ,  C23C28/021 ,  C23C28/023 ,  C25D3/562 ,  C25D5/022 ,  C25D5/54 ,  H01H2001/0047 ,  H01H2061/006

    Abstract: A material for forming a conductive structure for a MEMS device is described, which is an alloy containing about 0.01% manganese and the remainder nickel. Data shows that the alloy possesses advantageous mechanical and electrical properties. In particular, the sheet resistance of the alloy is actually lower than the sheet resistance of the pure metal. In addition, the alloy may have superior creep and higher recrystallization temperature than the pure metal. It is hypothesized that these advantageous material properties are a result of the larger grain structure existing in the NiMn alloy film compared to the pure nickel metal film. These properties may make the alloy appropriate for applications such as MEMS thermal electrical switches for telecommunications applications.

    Abstract translation: 描述了用于形成用于MEMS器件的导电结构的材料，其是含有约0.01％的锰和其余的镍的合金。 数据显示，该合金具有有利的机械和电学性能。 特别地，合金的薄层电阻实际上低于纯金属的薄层电阻。 此外，与纯金属相比，合金具有优异的蠕变和更高的再结晶温度。 假设这些有利的材料性质是与纯镍金属膜相比NiMn合金膜中存在较大的晶粒结构的结果。 这些特性可以使该合金适用于诸如用于电信应用的MEMS热电开关。

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