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公开(公告)号:US5702975A
公开(公告)日:1997-12-30
申请号:US719876
申请日:1996-09-25
Applicant: Hyung-Sup Yoon , Jin-Hee Lee , Chul-Sun Park , Kwang-Eui Pyun
Inventor: Hyung-Sup Yoon , Jin-Hee Lee , Chul-Sun Park , Kwang-Eui Pyun
IPC: H01L29/40 , H01L21/285 , H01L21/335 , H01L21/76 , H01L21/302
CPC classification number: H01L29/66462 , H01L21/28587 , H01L21/7605
Abstract: A method for isolating a semiconductor device is disclosed including the steps of sequentially growing a plurality of material layers on a semiconductor substrate, etching the material layers down to a predetermined depth of the substrate to thereby define an active region, forming a semi-insulating film on the exposed semiconductor substrate in order to planarize the step-difference of the active region and the isolation region, and then, forming an ohmic metal layer on a space where the semi-insulating film is regrown.
Abstract translation: 公开了一种用于隔离半导体器件的方法,包括以下步骤:在半导体衬底上顺序生长多个材料层,将材料层蚀刻到衬底的预定深度,从而限定有源区,形成半绝缘膜 在露出的半导体衬底上,以平坦化有源区和隔离区的阶梯差,然后在再次生长半绝缘膜的空间上形成欧姆金属层。
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公开(公告)号:US5693548A
公开(公告)日:1997-12-02
申请号:US359197
申请日:1994-12-19
Applicant: Jin-Hee Lee , Sang-Soo Choi , Hyung-Sup Youn , Chul-Soon Park , Hyung-Jun Yoo , Hyung-Moo Park
Inventor: Jin-Hee Lee , Sang-Soo Choi , Hyung-Sup Youn , Chul-Soon Park , Hyung-Jun Yoo , Hyung-Moo Park
IPC: G03F7/095 , G03F7/20 , H01L21/027 , H01L21/285 , H01L21/335 , H01L21/265
CPC classification number: H01L29/66462 , G03F7/095 , G03F7/2059 , H01L21/0277 , H01L21/28587 , Y10S148/10 , Y10S148/14 , Y10S438/949
Abstract: A method for making a T-shaped gate of a field effect transistor is disclosed. The method includes the steps of sequentially depositing first and second photoresist layers on a semiconductor substrate and performing an exposure using electron beams having different energy, one of the electron beams having a first energy to lightly expose only the second photoresist layer and the other of the electron beams having a second energy to lightly expose all of the first and second layers. The invention reduces gate resistance and parasitic capacitance of the T-shaped gate.
Abstract translation: 公开了一种用于制造场效应晶体管的T形栅极的方法。 该方法包括以下步骤:在半导体衬底上依次沉积第一和第二光致抗蚀剂层并使用具有不同能量的电子束进行曝光,其中一个电子束具有第一能量,以仅仅暴露第二光致抗蚀剂层,另一个 电子束具有第二能量以轻微地暴露所有第一层和第二层。 本发明降低了T形栅极的栅极电阻和寄生电容。
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公开(公告)号:USD858176S1
公开(公告)日:2019-09-03
申请号:US29628620
申请日:2017-12-06
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD833197S1
公开(公告)日:2018-11-13
申请号:US29586846
申请日:2016-12-07
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD826624S1
公开(公告)日:2018-08-28
申请号:US29558066
申请日:2016-03-15
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD809850S1
公开(公告)日:2018-02-13
申请号:US29564942
申请日:2016-05-17
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD807689S1
公开(公告)日:2018-01-16
申请号:US29586864
申请日:2016-12-07
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD807688S1
公开(公告)日:2018-01-16
申请号:US29586863
申请日:2016-12-07
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD807685S1
公开(公告)日:2018-01-16
申请号:US29586853
申请日:2016-12-07
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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公开(公告)号:USD807683S1
公开(公告)日:2018-01-16
申请号:US29564932
申请日:2016-05-17
Applicant: Jin Hee Lee
Designer: Jin Hee Lee
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