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81.发明申请公开(公告)号：US20150145110A1
公开(公告)日：2015-05-28
申请号：US14553799
申请日：2014-11-25
Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd.
Inventor： Jing-En LUAN
IPC: H01L23/00 , H01L21/82 , H01L21/56 , H01L23/495 , H01L23/28
CPC classification number: H01L24/83 , H01L21/561 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/73 , H01L24/84 , H01L24/92 , H01L24/97 , H01L2224/29111 , H01L2224/32245 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40499 , H01L2224/73263 , H01L2224/83801 , H01L2224/84801 , H01L2224/92246 , H01L2224/97 , H01L2924/181 , H01L2924/01082 , H01L2924/00014 , H01L2924/0105 , H01L2924/014 , H01L2224/83 , H01L2224/84 , H01L2924/00012
Abstract: Embodiments of the present disclosure relate to a leadless surface mount assembly package, an electronic device, and a method for forming a surface mount assembly package, which package comprising: a first lead; a second lead; a chip fixed on an upper surface of the first lead; a clip coupled to the second lead, a lower surface of the clip being fixed to an upper surface of the chip. The surface mount assembly package further comprises a molding compound for molding the first lead, the second lead, the chip, and the clip, wherein ends of the first lead and the second lead are only exposed from the molding compound, without outward extending from the molding compound. By using the embodiments of the present disclosure, costs can be saved and processing flow can be simplified, and a new-model leadless surface mount assembly package is obtained.
Abstract translation: 本公开的实施例涉及无引线表面安装组件封装，电子器件和用于形成表面安装组件封装的方法，该封装包括：第一引线; 第二个领先; 固定在所述第一引线的上表面上的芯片; 夹子，其联接到所述第二引线，所述夹子的下表面固定到所述芯片的上表面。 表面安装组件封装还包括用于模制第一引线，第二引线，芯片和夹子的模制化合物，其中第一引线和第二引线的端部仅从模制化合物暴露而不向外延伸 模塑料。 通过使用本公开的实施例，可以节省成本并且可以简化处理流程，并且获得新型无引线表面安装组件封装。
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公开(公告)号：US09007101B2
公开(公告)日：2015-04-14
申请号：US14073494
申请日：2013-11-06
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Ni Zeng
CPC classification number: H03K17/00 , H03K17/06 , H03K2017/066 , H03K2217/0036 , H03K2217/0063
Abstract: A driver circuit for driving a power transistor includes a converter having a first transistor and a second transistor coupled in series between a supply node and a reference node. The converter is configured to receive a first signal and in response thereto generate a second signal for selectively controlling status of the power transistor. The ratio of a first leakage current of the first transistor to a second leakage current of the second transistor is used in the generation of the second signal which is applied to the control terminal of a transistor switch that is selectively actuated to turn off the power transistor.
Abstract translation: 用于驱动功率晶体管的驱动电路包括具有串联耦合在供电节点和参考节点之间的第一晶体管和第二晶体管的转换器。 转换器被配置为接收第一信号，并响应于此产生用于选择性地控制功率晶体管状态的第二信号。 第一晶体管的第一泄漏电流与第二晶体管的第二漏电流之比用于产生施加到晶体管开关的控制端的第二信号，晶体管开关被选择性地致动以关断功率晶体管 。
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83.发明授权Input clamping structure for sound quality improvement in car-radio class-AB power amplifier design 有权输入钳位结构，用于汽车无线电类AB功率放大器设计中的音质改善公开(公告)号：US08970280B2
公开(公告)日：2015-03-03
申请号：US13707350
申请日：2012-12-06
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Mei Yang , YueHua Wang , Xaut Zhang , Kelvin Wen , XiangSheng Li
CPC classification number: H03F3/211 , H03F3/187 , H03F3/26 , H03F3/4508 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2203/21131 , H03F2203/45102 , H03F2203/45154 , H03F2203/45244 , H03F2203/45528 , H03F2203/45552
Abstract: A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages, and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages.
Abstract translation: 用于AB类放大器的钳位电路包括参考电压电路，具有耦合到参考电压电路的输入的四个NPN达林顿晶体管和用于提供四个钳位电压的输出，以及具有耦合到参考电压电路的输入的分离NPN达林顿晶体管 ，以及四个独立的输出，用于提供四个交流接地电压。
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公开(公告)号：US08907705B2
公开(公告)日：2014-12-09
申请号：US13648557
申请日：2012-10-10
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Tao Tao Huang , Meng Wang
CPC classification number: H03K4/502
Abstract: A fully integrated ramp generator circuit includes a first current generator that sources current to first capacitor through a first transistor that is gate controlled by the complement of a periodic signal. The ramping voltage stored on the first capacitor is buffered to an output node as a ramp output signal. A second transistor couples the output node to the first current generator and is gate controlled by the periodic signal. The periodic signal is generated at the output of a flip-flop that receives an input clock signal and reset signal. The reset signal is generated by a comparator circuit operable to compare the voltage on a second capacitor to a reference. The second capacitor is charged by a second current source and discharged by a third transistor that is gate controlled by the periodic signal.
Abstract translation: 完全集成的斜坡发生器电路包括第一电流发生器，其通过由周期信号的补码门控制的第一晶体管向第一电容器供电。 存储在第一电容器上的斜坡电压作为斜坡输出信号被缓冲到输出节点。 第二晶体管将输出节点耦合到第一电流发生器，并由周期信号进行栅极控制。 周期性信号在接收输入时钟信号和复位信号的触发器的输出端产生。 复位信号由比较器电路产生，比较器电路可操作以将第二电容器上的电压与参考电压进行比较。 第二电容器由第二电流源充电，并由被周期信号门控制的第三晶体管放电。
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公开(公告)号：US20140184278A1
公开(公告)日：2014-07-03
申请号：US14073494
申请日：2013-11-06
Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
Inventor： Ni ZENG
IPC: H03K3/012
CPC classification number: H03K17/00 , H03K17/06 , H03K2017/066 , H03K2217/0036 , H03K2217/0063
Abstract: A driver circuit for driving a power transistor includes a converter having a first transistor and a second transistor coupled in series between a supply node and a reference node. The converter is configured to receive a first signal and in response thereto generate a second signal for selectively controlling status of the power transistor. The ratio of a first leakage current of the first transistor to a second leakage current of the second transistor is used in the generation of the second signal which is applied to the control terminal of a transistor switch that is selectively actuated to turn off the power transistor.
Abstract translation: 用于驱动功率晶体管的驱动电路包括具有串联耦合在供电节点和参考节点之间的第一晶体管和第二晶体管的转换器。 转换器被配置为接收第一信号，并响应于此产生用于选择性地控制功率晶体管状态的第二信号。 第一晶体管的第一泄漏电流与第二晶体管的第二漏电流之比用于产生施加到晶体管开关的控制端的第二信号，晶体管开关被选择性地致动以关断功率晶体管 。
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Patent Agency Ranking
86.发明申请CURRENT SLOPE CONTROL METHOD AND APPARATUS FOR POWER DRIVER CIRCUIT APPLICATION 有权电流斜率控制方法和电源驱动电路应用的设备公开(公告)号：US20130300394A1
公开(公告)日：2013-11-14
申请号：US13875651
申请日：2013-05-02
Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
Inventor： Meng Wang , Tao Tao Huang
IPC: H02M3/158
CPC classification number: G09G3/3225 , G09G3/20 , G09G3/3208 , G09G3/3648 , G09G2300/0842 , G09G2310/0259 , G09G2310/0291 , G09G2320/041 , G09G2320/043 , G09G2330/02 , G09G2330/025 , G09G2330/028 , H02M3/158 , H03K5/12 , H03K17/04123 , H03K17/687 , H03K2217/0063 , H03K2217/0072
Abstract: A low side driver includes a first transistor coupled in series with a second transistor at a low side voltage node for a load. A capacitance is configured to store a voltage and a voltage buffer circuit has an input coupled to receive the voltage stored by the capacitance and an output coupled to drive a control node of the second transistor with the stored voltage. A current source supplies current through a switch to the capacitance and the input of the voltage buffer circuit. The switch is configured to be actuated by an oscillating enable signal so as to cyclically source current from the current source to the capacitance and cause a stepped increase in the stored voltage which is applied by the buffer circuit to the control node of the second transistor.
Abstract translation: 低侧驱动器包括与用于负载的低侧电压节点与第二晶体管串联耦合的第一晶体管。 电容被配置为存储电压，并且电压缓冲器电路具有耦合以接收由电容存储的电压的输入和耦合以用所存储的电压驱动第二晶体管的控制节点的输出。 电流源通过开关将电流提供给电容和电压缓冲电路的输入。 该开关被配置为由振荡使能信号激励，以便将来自电流源的电流循环地引导到电容，并且使由缓冲电路施加到第二晶体管的控制节点的存储电压发生阶梯式增加。
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87.发明申请VOLTAGE CONTROLLED VARIABLE RESISTOR SUITABLE FOR LARGE SCALE SIGNAL APPLICATION 有权电压控制可变电阻适用于大规模信号应用公开(公告)号：US20130141152A1
公开(公告)日：2013-06-06
申请号：US13678782
申请日：2012-11-16
Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
Inventor： Gang Zha
IPC: H03L5/00
CPC classification number: H03L5/00 , H03H11/245
Abstract: A voltage controlled variable resistor circuit is configured to variably attenuate a variable source signal. A fixed attenuation circuit is coupled to receive the variable source signal and output an attenuated variable source signal. The variable source signal is further applied across a variable resistive divider formed of a fixed resistive circuit and a variable resistive circuit. The variable resistive circuit has a first input configured to receive the attenuated variable source signal and a second input configured to receive a variable resistance control signal. The variable resistive circuit is configured to have a resistance which is variable in response to the attenuated variable source signal and the variable resistance control signal.
Abstract translation: 电压控制可变电阻电路被配置为可变地衰减可变源信号。 耦合固定衰减电路以接收可变源信号并输出衰减的可变源信号。 可变源信号进一步施加在由固定电阻电路和可变电阻电路构成的可变电阻分压器上。 可变电阻电路具有被配置为接收衰减的可变源信号的第一输入和被配置为接收可变电阻控制信号的第二输入。 可变电阻电路被配置为具有响应于衰减的可变源信号和可变电阻控制信号而变化的电阻。
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88.发明授权公开(公告)号：US12056912B2
公开(公告)日：2024-08-06
申请号：US17512080
申请日：2021-10-27
Inventor： Etienne Bossart , Ji Nan Li , Thomas Perotto
CPC classification number: G06V10/507 , G01S7/4816 , G01S17/08 , G06V20/00
Abstract: In an embodiment a method for detecting a presence of at least one object in a field of view of a time of flight sensor includes successively generating, by the time of flight sensor, histograms, each histogram comprising several classes associating a number of photons detected at a given acquisition period, adding several successively generated histograms so as to obtain a summed histogram and analyzing the summed histogram to detect the presence of at least one object in the field of view of the time of flight sensor.
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公开(公告)号：US11954260B2
公开(公告)日：2024-04-09
申请号：US17374815
申请日：2021-07-13
Inventor： Mirko Guarnera , Wenbin Yang , Enrico Rosario Alessi , Fabio Passaniti
CPC classification number: G06F3/017 , H04M1/0281
Abstract: A system and method for determining handedness in a device. The system including a first electrode, a second electrode, a sensor, and a processing circuit coupled to each other. The first electrode is placed at a first location, and the second electrode is placed at a second location on the device—the first location is different from the second location. The electrodes are configured to sense a variation in an electrostatic field in response to a user interacting with the device. The sensor detects a differential potential between the first electrode and the second electrode, and the processing circuit determines whether the user is interacting with the device using a left hand or a right hand. The determining is based on data received from the sensor corresponding to the differential potential.
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公开(公告)号：US20240056046A1
公开(公告)日：2024-02-15
申请号：US18493282
申请日：2023-10-24
Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd.
Inventor： XiangSheng Li , Ru Feng Du
CPC classification number: H03G3/3005 , H03F3/187 , H04R3/00 , H04R29/00 , H03F2200/03 , H03G2201/103
Abstract: An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.
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