公开(公告)号：US12170778B2

公开(公告)日：2024-12-17

申请号：US17677400

申请日：2022-02-22

Applicant: Intel Corporation

Inventor： Atthar H. Mohammed ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray ,  Narayan Biswal ,  Richmond Hicks ,  Arthur J. Runyan ,  Nausheen Ansari

IPC: H04N19/142 ,  H04N5/14 ,  H04N19/174 ,  H04N19/87 ,  H04N19/895 ,  H04N21/4402 ,  H04N21/442

Abstract: Systems, apparatuses and methods may include a source device that generates a scene change notification in response to a movement of a camera, modifies an encoding scheme associated with the video content captured by the camera in response to the scene change notification, identifies a full-frame difference threshold, wherein scene analysis information includes frame difference data, and compares the frame difference data to an intermediate threshold that is less than the full-frame difference threshold, wherein the scene change notification is generated when the frame difference data exceeds the intermediate threshold. A sink device may obtain transport quality data associated with video content, modify an output parameter of a display based on the transport quality data, determine a view perspective of a still image containing a plurality of image slices, retrieve only a subset of the plurality of image slices based on the view perspective and decode the retrieved subset.

公开(公告)号：US20240355306A1

公开(公告)日：2024-10-24

申请号：US18753839

申请日：2024-06-25

Applicant: Intel Corporation

Inventor： Krishna Nidamanuri ,  Arvind Tomar ,  Bharatkumar Mahajan ,  Perazhi Sameer Kalathil ,  Nausheen Ansari ,  Arthur Runyan

IPC: G09G5/00 ,  G06F1/10 ,  G06F3/14

CPC classification number: G09G5/006 ,  G06F1/10 ,  G06F3/14 ,  G09G2320/0257 ,  G09G2330/023 ,  G09G2340/0435

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to reduce dynamic refresh rate power consumption. An example apparatus includes interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to modify a value of a source clock based on a detected application type, generate a pixel clock value change request based on the application type, cause transmission of the pixel clock value change request to a display, and cause transmission of pixels to the display at the modified source clock value.

公开(公告)号：US11990996B2

公开(公告)日：2024-05-21

申请号：US17967125

申请日：2022-10-17

Applicant: INTEL CORPORATION

Inventor： Nausheen Ansari ,  Ziv Kabiry ,  Gal Yedidia

IPC: H04L1/00 ,  H03M5/00 ,  H03M5/14 ,  H03M13/00 ,  H03M13/15 ,  H03M13/29 ,  H03M13/31

CPC classification number: H04L1/0057 ,  H03M5/145 ,  H03M13/1515 ,  H03M13/2906 ,  H03M13/31 ,  H04L1/0041

Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.

公开(公告)号：US11763774B2

公开(公告)日：2023-09-19

申请号：US17373587

申请日：2021-07-12

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Gary Smith

IPC: G09G5/00

CPC classification number: G09G5/008 ,  G09G2330/021 ,  G09G2350/00 ,  G09G2370/04

Abstract: The present disclosure is directed to systems and methods of maintaining source device to sink device synchronization in systems in which the source device enters a Panel Self-Refresh (PSR/PSR2) mode and the sink device enables adaptive synchronization with the source device. To maintain synchronization, in some instances the source device and the sink device may maintain synchronization contemporaneous with at least a portion of the PSR/PSR2 operating mode. To maintain synchronization, in some instances, a high-bandwidth communications link may be maintained between the source device and the sink device. In some instances, synchronization between the source device and the sink device may be interrupted upon the source device entering the PSR/PSR2 operating mode and may be re-established upon the source device exiting the PSR/PSR2 operating mode.

公开(公告)号：US11653073B2

公开(公告)日：2023-05-16

申请号：US16927600

申请日：2020-07-13

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Gary K. Smith ,  Srikanth Kambhatla

IPC: H04N21/8547 ,  H04N21/44 ,  G09G5/36 ,  G09G3/20 ,  G09G3/36 ,  G09G5/12 ,  G06F3/14 ,  H04N21/43 ,  G09G5/00 ,  H04N21/845

CPC classification number: H04N21/8547 ,  G06F3/1446 ,  G09G3/2096 ,  G09G3/3618 ,  G09G5/006 ,  G09G5/12 ,  H04N21/4305 ,  H04N21/43072 ,  H04N21/44016 ,  H04N21/8456 ,  G09G2300/026 ,  G09G2320/0252 ,  G09G2340/0464

Abstract: Technology for a display device is described. The display device can include at least one display screen operable to show at least one display panel. The display device can include a controller. The controller can receive a content frame from a content source over a transport topology. The controller can receive a presentation timestamp (PTS) associated with the content frame, where the PTS indicates an earliest time at which the content frame is to be displayed at the display device. The controller can provide the content frame for display on the display panel at a subsequent panel refresh opportunity in accordance with the PTS.

公开(公告)号：US11587531B2

公开(公告)日：2023-02-21

申请号：US16144417

申请日：2018-09-27

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Zhiming Zhuang

IPC: G09G5/12 ,  G06F3/14 ,  G09G5/00

Abstract: Technologies for power efficient display synchronization are disclosed. A compute device may be connected to two display devices. The compute device may send image data to be displayed on each of the display devices in a burst mode, sending the image data in less time than the time between frames. The compute device may then enter a low-power state prior to sending the next image to the display devices. Before sending the next image to the display devices, the compute device may send a synchronization signal, which the display devices may use to synchronize the timing of displaying images between the two display devices.

公开(公告)号：US11522640B2

公开(公告)日：2022-12-06

申请号：US17353000

申请日：2021-06-21

Applicant: INTEL CORPORATION

Inventor： Nausheen Ansari ,  Ziv Kabiry ,  Gal Yedidia

IPC: H04L1/00 ,  H03M13/15 ,  H03M13/29 ,  H03M13/00 ,  H03M5/14 ,  H03M13/31

Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.

公开(公告)号：US11467648B2

公开(公告)日：2022-10-11

申请号：US16811663

申请日：2020-03-06

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Kevin W. Krueger ,  Vishal R. Sinha ,  Seh Kwa

IPC: G06F1/3234 ,  G06F8/658 ,  G06F1/3212

Abstract: Methods, apparatus, systems and articles of manufacture to reduce power consumption and improve battery life of display systems using adaptive sync are disclosed. An example apparatus includes an interface to transmit frame data to a sink device, the frame data generated by a processor; a timer to initiate in response to the transmission of the frame data to the sink device; and the interface to transmit a low power indication to the sink device after the timer reaches a threshold amount of time.

公开(公告)号：US20220191060A1

公开(公告)日：2022-06-16

申请号：US17561561

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Srikanth Kambhatla ,  Nausheen Ansari

IPC: H04L12/40 ,  H04L12/64 ,  H04N21/242 ,  H04N21/434 ,  H04N21/2343 ,  H04N21/236

Abstract: In some examples, a transport agnostic source includes a streaming device to stream video on diverse transport topologies including isochronous and non-isochronous transports. In some examples, a transport agnostic sink includes a receiving device to receive streamed video from diverse transport topologies including isochronous and non-isochronous transports.

公开(公告)号：US20210193010A1

公开(公告)日：2021-06-24

申请号：US17133275

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Seh Kwa ,  Paul S. Diefenbaugh ,  Robert Johnston

IPC: G09G3/20

Abstract: Technology for a display source device is described. The display source device can receive a frame start indication from a display panel at a start of a frame. The display source device can align a timing of the display source device to a timing of the display panel based on the frame start indication received from the display panel to obtain frame-level synchronization between the display source device and the display panel. The display source device can send one or more frame update regions to the display panel in accordance with the timing of the display source device that is aligned to the timing of the display panel.