Electrical time constant compensation method for switched, voltage-mode driver circuit
    81.
    发明专利
    Electrical time constant compensation method for switched, voltage-mode driver circuit 审中-公开
    用于开关电压模式驱动电路的电气时间常数补偿方法

    公开(公告)号:JP2003067004A

    公开(公告)日:2003-03-07

    申请号:JP2002161448

    申请日:2002-06-03

    Inventor: HILL JOHN P

    CPC classification number: G11B5/59605 G06F1/26 G11B5/5526

    Abstract: PROBLEM TO BE SOLVED: To provide a system and a method which make it possible to correct a driver at a faster rate.
    SOLUTION: A power driver for driving a signal on a load uses a voltage- mode driver. A system processor generates commands indicating a programmed drive signal desired from the voltage-mode driver. A lead compensator determines a compensated command to compensate for an admittance function of the load. The compensated commands are coupled to the voltage-mode driver, so that the voltage-mode driver generates a voltage output based upon the compensated command.
    COPYRIGHT: (C)2003,JPO

    Abstract translation: 要解决的问题:提供一种能够以更快的速度校正驾驶员的系统和方法。 解决方案:用于驱动负载信号的电源驱动器使用电压模式驱动器。 系统处理器产生指示从电压模式驱动器所需的编程驱动信号的命令。 引线补偿器确定补偿指令以补偿负载的导纳功能。 补偿的命令被耦合到电压模式驱动器,使得电压模式驱动器基于补偿的指令产生电压输出。

    Octagonal interconnection network for linking processing nodes on an soc device and method of operating the same
    82.
    发明专利
    Octagonal interconnection network for linking processing nodes on an soc device and method of operating the same 审中-公开
    用于连接SOC设备上的处理节点的OCTAGONAL互连网络及其操作方法

    公开(公告)号:JP2003008584A

    公开(公告)日:2003-01-10

    申请号:JP2002065556

    申请日:2002-03-11

    CPC classification number: H04L49/15 H04L49/109 H04L49/352 H04L49/357

    Abstract: PROBLEM TO BE SOLVED: To provide an enhanced interconnection network technology for routing data packets. SOLUTION: The octagonal interconnection network is provided for routing data packets. The interconnection network comprises (1) eight switching circuits for transferring data packets with each other (2) eight sequential data links bidirectionally coupling the eight switching circuits in sequence to thereby form an octagonal ring configuration and (3) four crossing data links, wherein a first crossing data link bidirectionally couples a first switching circuit to a fifth switching circuit, a second crossing data link bidirectionally couples a second switching circuit to a sixth switching circuit, a third crossing data link bidirectionally couples a third switching circuit to a seventh switching circuit, and a fourth crossing data link bidirectionally couples a fourth switching circuit to a eighth switching circuit.

    Abstract translation: 要解决的问题:提供一种用于路由数据包的增强型互连网络技术。 解决方案:提供八角互连网络用于路由数据包。 互连网络包括(1)用于彼此传送数据分组的八个切换电路(2)八个顺序数据链路,以顺序耦合八个切换电路,从而形成八角环配置,以及(3)四个交叉数据链路,其中a 第一交叉数据链路将第一开关电路双向耦合到第五开关电路,第二交叉数据链路将第二开关电路双向耦合到第六开关电路,第三交叉数据链路将第三开关电路双向耦合到第七开关电路, 并且第四交叉数据链路将第四开关电路双向耦合到第八开关电路。

    System and method for analog control of directional motor and other load
    87.
    发明专利
    System and method for analog control of directional motor and other load 审中-公开
    方向电机和其他负载的模拟控制系统与方法

    公开(公告)号:JP2007014194A

    公开(公告)日:2007-01-18

    申请号:JP2006177754

    申请日:2006-06-28

    CPC classification number: E05B81/06 E05B81/54 E05B81/56

    Abstract: PROBLEM TO BE SOLVED: To provide a system and method for analog control of directional motors and other loads. SOLUTION: Directional loads are operable in plural directions. For example, A directional motor can rotate in clockwise and anti-clockwise directions. A directional load driver generates an output signal that causes directional loads to operate in one of the directions, thereby giving required function. The required function is identified using input signals such as state encoding input signals or the like. The state encoding input signals can be received by the directional load driver via a single wire or a single input pin. Under the control of the directional load driver, the directional loads can perform any function among a variety of functions. In the examples of applications to automobiles, the directional loads can perform window opening and closing, door locking or unlocking, or door opening and closing. In the examples of other applications, the directional loads can be used for housing door locking, home automation, or controls in industries. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:提供用于定向电动机和其他负载的模拟控制的系统和方法。

    解决方案:定向负载可在多个方向操作。 例如,定向马达可以顺时针和逆时针方向旋转。 定向负载驱动器产生一个输出信号,使得定向负载在其中一个方向上运行,从而产生所需的功能。 使用诸如状态编码输入信号等的输入信号来识别所需的功能。 状态编码输入信号可以由定向负载驱动器经由单线或单输入引脚接收。 在定向负载驱动器的控制下,定向负载可以在各种功能之间执行任何功能。 在应用于汽车的示例中,定向负载可以执行窗口打开和关闭,门锁定或解锁,或门打开和关闭。 在其他应用的示例中,定向负载可用于门锁,家庭自动化或行业中的控制。 版权所有(C)2007,JPO&INPIT

    Finite field based short error propagation modulation code
    88.
    发明专利
    Finite field based short error propagation modulation code 审中-公开
    基于有限域的短错误传播调制码

    公开(公告)号:JP2006172708A

    公开(公告)日:2006-06-29

    申请号:JP2005361301

    申请日:2005-12-15

    Abstract: PROBLEM TO BE SOLVED: To provide signal modulation technology in which flexibility is improved.
    SOLUTION: The invention provides a data modulation method applicable to make data streams tend to have desired properties, useful for clock recovery, making signals more distinguishable, or enforcing run-length conditions. A stream of input data and a corresponding stream of output data grouped into elements of a finite field. Input elements of the input data are modified by a transform generating output elements of the output data, such that a current output element is linear combination of current input element and at least one previous output element. A multiplier applied to at least one previous output element is non-zero and non-unity element of the finite field. A set of initial conditions inherent to the transform is selected such that the output elements resulting from the transform tend to have the desired property.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供灵活性提高的信号调制技术。 解决方案:本发明提供了一种适用于使数据流倾向于具有期望特性的数据调制方法,对于时钟恢复有用,使得信号更加可区分或执行运行长度条件。 输入数据流和分组为有限域的元素的输出数据的相应流。 通过产生输出数据的输出元件的变换来修改输入数据的输入元件,使得当前输出元件是当前输入元件和至少一个先前输出元件的线性组合。 应用于至少一个先前输出元素的乘数是有限域的非零和非单位元素。 选择变换固有的一组初始条件,使得由变换产生的输出元素倾向于具有期望的属性。 版权所有(C)2006,JPO&NCIPI

    Write driver with power optimization and interconnect impedance matching
    89.
    发明专利
    Write driver with power optimization and interconnect impedance matching 审中-公开
    具有功率优化和互连阻塞匹配的写驱动器

    公开(公告)号:JP2005302286A

    公开(公告)日:2005-10-27

    申请号:JP2005117072

    申请日:2005-04-14

    CPC classification number: G11B5/02

    Abstract: PROBLEM TO BE SOLVED: To improve a write head in a hard disk drive system by providing impedance matching and a power amplification effect.
    SOLUTION: A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line is provided. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:通过提供阻抗匹配和功率放大效果来改善硬盘驱动器系统中的写入头。 解决方案:提供一种用于通过互连或柔性传输线连接到写入头的写入头来驱动写入电流的写入驱动器。 写驱动器包括将写驱动器的输出阻抗与互连的奇特特性阻抗匹配的电路,并且包括产生到写头的电流输出的电流源。 写入驱动器提供电流放大效应,因为输出电流是通过写入线圈驱动的写入电流的一半。 阻抗匹配电路包括具有等于互连的奇特性阻抗的电阻的输出电阻器。 写入驱动器包括电压源,其操作以在互连的传输延迟的两倍的初始周期期间在输出电阻器上保持零电压降。 版权所有(C)2006,JPO&NCIPI

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