公开(公告)号：US20110062375A1

公开(公告)日：2011-03-17

申请号：US12952540

申请日：2010-11-23

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC: C09K13/08

CPC classification number: H01L21/02032 ,  H01L21/31111

Abstract: An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

Abstract translation: 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

公开(公告)号：US20110014726A1

公开(公告)日：2011-01-20

申请号：US12838901

申请日：2010-07-19

Applicant: Tai-Yung YU ,  Hue Mei JAO ,  Jin-Lin LIANG ,  Chien-Hua LI ,  Cheng-Long TAO ,  Shian Wei MAO ,  Chien-Chang FANG

Inventor： Tai-Yung YU ,  Hue Mei JAO ,  Jin-Lin LIANG ,  Chien-Hua LI ,  Cheng-Long TAO ,  Shian Wei MAO ,  Chien-Chang FANG

IPC: H01L21/76 ,  H01L21/66

CPC classification number: H01L21/76224 ,  H01L21/02112 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/762 ,  H01L21/76229 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

Abstract: A method for forming a shallow trench isolation (STI) structure with a predetermined target height is provided. A substrate having a pad oxide layer formed on the substrate is provided. A nitride-containing layer with a thickness is formed on the pad oxide. A STI structure is formed and extends through the nitride-containing layer, the pad oxide layer, into the substrate. The thickness of the nitride-containing layer is measured to calculate the height of STI structure according to a correlation between the thickness of the nitride-containing layer and the height of STI structure. A thickness of the top portion STI structure to be removed is determined according to the difference between the height of the STI structure and the predetermined target height and is removed in a first etching process. The nitride-containing layer is removed without etching the STI structure or the pad oxide layer in a second etching process.

Abstract translation: 提供了一种用于形成具有预定目标高度的浅沟槽隔离（STI）结构的方法。 提供了在基板上形成有衬垫氧化层的衬底。 在衬垫氧化物上形成厚度的含氮化物层。 形成STI结构，并且通过含氮化物层，衬垫氧化物层延伸到衬底中。 测量含氮化物层的厚度，以根据含氮层的厚度和STI结构的高度之间的相关性来计算STI结构的高度。 根据STI结构的高度和预定的目标高度之间的差来确定待去除的顶部STI结构的厚度，并在第一蚀刻工艺中去除。 在第二蚀刻工艺中不去除STI结构或焊盘氧化物层，去除含氮化物层。

公开(公告)号：US20090111269A1

公开(公告)日：2009-04-30

申请号：US11931796

申请日：2007-10-31

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC: H01L21/311 ,  C09K13/08

CPC classification number: H01L21/02032 ,  H01L21/31111

Abstract: By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

Abstract translation: 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

公开(公告)号：US08696930B2

公开(公告)日：2014-04-15

申请号：US12952540

申请日：2010-11-23

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC: C09K13/08

CPC classification number: H01L21/02032 ,  H01L21/31111

Abstract: An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

Abstract translation: 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

公开(公告)号：US07910014B2

公开(公告)日：2011-03-22

申请号：US11963040

申请日：2007-12-21

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

IPC: C03C15/00 ,  C03C25/68

CPC classification number: H01L21/67086 ,  H01L21/67253

Abstract: A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.

Abstract translation: 用于半导体制造的化学处理浴和系统利用动态加标模型，其基本上不断监测处理槽中的化学浓度，并定期添加新鲜化学品，以将化学浓度维持在所需水平。 蚀刻速率和蚀刻选择性保持在所需的水平，避免了不期望的沉淀的污染。 系统和方法自动将浓度水平与与各种技术相关联的多个控制限制进行比较，并识别可能经历处理的技术或技术。

公开(公告)号：US20090233447A1

公开(公告)日：2009-09-17

申请号：US12046096

申请日：2008-03-11

Applicant: Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

Inventor： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

IPC: H01L21/461

CPC classification number: H01L21/02032 ,  H01L21/02079 ,  H01L21/31111 ,  H01L21/31116

Abstract: A method of recycling a control wafer having a dielectric layer deposited thereon involves removing most of the dielectric layer by plasma etching leaving a residual film of the dielectric and then removing the residual dielectric film by a wet etching process. The combination of the dry and wet etching provides effective removal of the dielectric material without damaging the wafer substrate and any residual wet etching byproduct particulate remaining on the wafer substrate is then removed by APM cleaning and scrubbing.

Abstract translation: 回收具有沉积在其上的电介质层的控制晶片的方法包括通过等离子体蚀刻去除大部分介电层，留下电介质的残留膜，然后通过湿蚀刻工艺去除残留的电介质膜。 干蚀刻和湿蚀刻的组合提供有效去除电介质材料而不损坏晶片衬底，然后通过APM清洁和擦洗除去留在晶片衬底上的任何残留的湿蚀刻副产物颗粒。

公开(公告)号：US07851374B2

公开(公告)日：2010-12-14

申请号：US11931796

申请日：2007-10-31

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/02032 ,  H01L21/31111

Abstract: By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

Abstract translation: 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

公开(公告)号：US20110223767A1

公开(公告)日：2011-09-15

申请号：US13114333

申请日：2011-05-24

Applicant: Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin Chia Su ,  Li Te Hsu

Inventor： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin Chia Su ,  Li Te Hsu

IPC: H01L21/311 ,  B82Y40/00

CPC classification number: H01L21/02032 ,  H01L21/02079 ,  H01L21/31111 ,  H01L21/31116

Abstract: A method of recycling a control wafer having a low-k dielectric layer deposited thereon involves etching a portion of the low-k dielectric layer using a plasma resulting in a residual film of the low-k dielectric layer and byproduct particulates of carbon on the substrate. The residual dielectric film is removed by wet etching with a low polarization organic solvent that includes HF and a surfactant.

Abstract translation: 回收具有沉积在其上的低k电介质层的控制晶片的方法包括使用等离子体蚀刻低k电介质层的一部分，导致低k电介质层的残留膜和基底上碳的副产物微粒 。 通过用包括HF和表面活性剂的低极化有机溶剂的湿蚀刻除去残留的电介质膜。

公开(公告)号：US20090087929A1

公开(公告)日：2009-04-02

申请号：US11963040

申请日：2007-12-21

Applicant: Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

Inventor： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

IPC: H01L21/66

CPC classification number: H01L21/67086 ,  H01L21/67253

Abstract: A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.

Abstract translation: 用于半导体制造的化学处理浴和系统利用动态加标模型，其基本上不断监测处理槽中的化学浓度，并定期添加新鲜化学品，以将化学浓度维持在所需水平。 蚀刻速率和蚀刻选择性保持在所需的水平，避免了不期望的沉淀的污染。 系统和方法自动将浓度水平与与各种技术相关联的多个控制限制进行比较，并识别可能经历处理的技术或技术。