公开(公告)号：JP2006024217A

公开(公告)日：2006-01-26

申请号：JP2005198397

申请日：2005-07-07

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： LIU WEI ,  MO FENG ,  SUN KUNQUAN ,  YU YANBING ,  ZHU YUJIE

IPC: G06F13/10 ,  G06F3/08 ,  G06K17/00

CPC classification number: G06F13/4022 ,  G06F13/385

Abstract: PROBLEM TO BE SOLVED: To provide a PDA device and a PDA microprocessor controller that allow simultaneous operation of multiple functions. SOLUTION: Simultaneous multiple functions are implemented by connecting all of the functional devices to a host controller 11 and multiplexing command signals and content data to and from the host controller to individual devices. The interconnection may be implemented using a dynamic switching matrix that allows the host controller to switch from one functional device to another using signal response from the functional devices. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供允许同时操作多个功能的PDA设备和PDA微处理器控制器。 解决方案：通过将所有功能设备连接到主机控制器11并将命令信号和内容数据复制到主机控制器和从主机控制器到各个设备来实现同时多个功能。 可以使用允许主机控制器使用来自功能设备的信号响应从一个功能设备切换到另一个功能设备的动态交换矩阵来实现互连。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2006270959A

公开(公告)日：2006-10-05

申请号：JP2006077917

申请日：2006-03-22

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： DEGANI YINON ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LIGUO ,  TAI KING LIEN

IPC: H03H7/075 ,  H04B1/40 ,  H04M1/00

CPC classification number: H01L27/016

Abstract: PROBLEM TO BE SOLVED: To provide an integrated passive device (IPD) designated to allow implementation of a cellular RF and Wi-Fi RF in a single hand held device. SOLUTION: To address the problem of RF interference, a thin film RF high rejection bandpass filter is formed in an IPD implementation. The IPD implementation preferably uses silicon as the substrate material. This allows the thin film RF high rejection bandpass filter to be made using silicon processing technology, and thus produce low cost filters that still meet stringent performance requirements demanded due to the co-existing RF units. In preferred embodiments of the invention, wafer level processing using silicon substrates adds to the cost effective manufacture of the high functional IPDs. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供被指定为允许在单手持设备中实现蜂窝RF和Wi-Fi RF的集成无源设备（IPD）。 解决方案：为了解决RF干扰的问题，在IPD实现中形成了薄膜RF高阻抗带通滤波器。 IPD实施优选使用硅作为基底材料。 这允许使用硅处理技术制造薄膜RF高阻抗带通滤波器，并因此产生仍然满足由于共存的RF单元要求的严格性能要求的低成本滤波器。 在本发明的优选实施例中，使用硅衬底的晶片级处理增加了高功能IPD的成本有效的制造。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2008072121A

公开(公告)日：2008-03-27

申请号：JP2007237420

申请日：2007-09-13

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： DEGANI YINON ,  CHEN YINCHAO ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LIQUO

IPC: H01F41/04 ,  H01F17/00 ,  H01F27/00 ,  H01L21/822 ,  H01L27/04

CPC classification number: H01F17/0006 ,  H01F2017/002 ,  H01F2017/0086 ,  H01L27/0641 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a flip bonding double substrate inductor a part of which is built on an IPD (Integrated Passive Device) base substrate and a fitting part of which is built on a cover (a second) substrate.
SOLUTION: Next the cover substrate is reversed and is bonded on the base substrate, thereby the two parts of the inductor are fitted. By this method, the inductor of two layers can be built without using a substrate of plural layers. Furthermore, a flip bonding double substrate inductor of four layers is formed by using two substrates each of which is a substrate of two layers.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种翻转接合双基板电感器，其一部分构建在IPD（集成无源器件）基底基板上，其配合部分构建在盖（第二）基板上。 解决方案：接下来，盖基板反转并结合在基底基板上，由此安装电感器的两部分。 通过这种方法，可以在不使用多层的基板的情况下构建两层的电感器。 此外，通过使用两个基板来形成四层的翻转接合双基板电感器，每个基板是两层的基板。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2005317979A

公开(公告)日：2005-11-10

申请号：JP2005131277

申请日：2005-04-28

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： DEGANI YINON ,  LAU MAUREEN Y ,  TAI KING LIEN

IPC: H01L27/04 ,  H01L21/00 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L23/34 ,  H01L27/01

CPC classification number: H01L28/40 ,  H01L27/016 ,  H01L27/101 ,  H01L28/10 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a method to manufacture an integrated passive device, an integrated passive device, and a substrate thereof.
SOLUTION: The integrated passive device (IPD) is formed on a polycrystalline silicon substrate. The method for manufacturing the IPD begins with a single-crystal handle wafer, deposits a thick polysilicon substrate layer on one or both faces of the begining wafer, forms the IPD on one of the multiple polysilicon substrate layers and removes the handle wafer. Thus, the polysilicon substrate is manufactured. In a preferred embodiment, the single-crystal silicon handle wafer is a silicon wafer that is rejected from a single-crystal silicon wafer manufacturing line.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种制造集成无源器件，集成无源器件及其衬底的方法。 解决方案：集成无源器件（IPD）形成在多晶硅衬底上。 用于制造IPD的方法是从单晶晶片处开始的，在初始晶片的一个或两个面上沉积厚的多晶硅衬底层，在多个多晶硅衬底层之一上形成IPD，并去除了处理晶片。 因此，制造多晶硅衬底。 在优选实施例中，单晶硅处理晶片是从单晶硅晶片生产线排除的硅晶片。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2009218576A

公开(公告)日：2009-09-24

申请号：JP2009011873

申请日：2009-01-22

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： DEGANI YINON ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LINGUO

IPC: H01L23/12 ,  H01L23/34

CPC classification number: H01L25/16 ,  H01L23/66 ,  H01L2223/6672 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/19103 ,  H01L2924/19104

Abstract: PROBLEM TO BE SOLVED: To provide an MCM package configured of an RF/IPD package improving a heat management. SOLUTION: An IPD board 24 is suitable for a system board 21 by using a thin RF chip 26 mounted in a stand-off between the IPD board 24 and the system board 21. An RF interconnection is conducted between the top section of the RF chip 26 and the bottom section of the IPD board 24. A heat is dissipated by connecting a heat sink layer on the RF chip 26 to the heat sink layer on the system board. The heat sink also fills the role as a grounding-plane connecting section. The combination of other types of integrators is manufactured by using the approach. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供由RF / IPD封装构成的MCM封装，从而改善热管理。 解决方案：IPD板24通过使用安装在IPD板24和系统板21之间的支架上的薄RF芯片26适用于系统板21. RF互连在 RF芯片26和IPD板24的底部部分。通过将RF芯片26上的散热层连接到系统板上的散热层来消散热量。 散热片也充当接地平面连接部分。 其他类型的集成商的组合通过使用该方法制造。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2007258713A

公开(公告)日：2007-10-04

申请号：JP2007067731

申请日：2007-03-16

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： DEGANI YINON ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  LAU MAUREEN ,  SUN KUNQUAN ,  SUN LINGUO

IPC: H01L21/822 ,  C23C16/24 ,  H01C7/00 ,  H01G4/12 ,  H01G4/30 ,  H01G4/33 ,  H01L21/205 ,  H01L27/01 ,  H01L27/04

CPC classification number: H01L27/016 ,  H01L21/84 ,  H01L23/66 ,  H01L27/13 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/19011 ,  H01L2924/19103 ,  H01L2924/00 ,  H01L2224/05599

Abstract: PROBLEM TO BE SOLVED: To explain the integration passive device (IPD) formed on a silicon substrate covered with an oxide layer by this description. SOLUTION: Undesirable charge storage in a silicon/oxide interface is immobilized by forming a trap center on a silicon surface. The trap center is manufactured from a polysilicon layer inserted between the silicon substrate and an oxide layer. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：通过该描述来解释形成在被氧化物层覆盖的硅衬底上的集成无源器件（IPD）。 解决方案：通过在硅表面上形成陷阱中心来固定硅/氧化物界面中的不期望的电荷存储。 陷阱中心由插入在硅衬底和氧化物层之间的多晶硅层制成。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2006323803A

公开(公告)日：2006-11-30

申请号：JP2005254239

申请日：2005-09-02

Applicant: SYCHIP INC

Inventor： CHOU WAI PING ,  SUN KUNQUAN ,  WANG JIAXIAN ,  YU YANBING ,  ZHAO MENG

IPC: G06K19/077

Abstract: PROBLEM TO BE SOLVED: To provide an SD/MMC type card satisfying an existing size standard and improving mounting density of components. SOLUTION: In this PDA (SD/MMC) device and a PDA card, a base board for mounting PDA components has two tiers. Components with a high profile are mounted on the lower tier, and devices with normal or low heights are mounted on the upper tier. The upper tier is contained in the portion of the card conforming to, for example, the 1.4 mm SDA standard thickness, while the lower tier is formed in the portion of the card that allows a larger thickness, for example SDA standard thickness 2.1 mm. COPYRIGHT: (C)2007,JPO&INPIT

公开(公告)号：JP2006191117A

公开(公告)日：2006-07-20

申请号：JP2006000985

申请日：2006-01-06

Applicant: Sychip Inc ,  サイチップ インコーポレーテッド

Inventor： CHIU ANTHONY M ,  DEGANI YINON ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LIQUO

IPC: H01L25/18 ,  H01L27/04 ,  H01L21/00 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L23/34 ,  H01L25/04 ,  H01L27/01

CPC classification number: H01L25/16 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L27/016 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48237 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: PROBLEM TO BE SOLVED: To provide a multi-chip module (MCM) that contains an integrated passive device (IPD) as a carrier substrate (IPD MCM). SOLUTION: Parasitic electrical interaction is controlled at one or both interfaces of the IPD, either by eliminating metal from the interfaces, or by the selective use of metal in parts of the MCM that are remote from sensitive device components. The sensitive device components are mainly analog circuit components, especially RF inductor elements. In the IPD layout, the components likely to be affected are separated from other components. This allows the implementation of selective metal approach. It also allows parasitic interaction on top of the IPD substrate to be reduced by the selective placement of IC semiconductor chips and IC chip ground planes. In the preferred embodiments of the IPD MCM, the IPD substrate is polycrystalline. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种包含集成无源器件（IPD）作为载体衬底（IPD MCM）的多芯片模块（MCM）。 解决方案：通过从接口中消除金属，或通过远离敏感器件组件的MCM部分中选择性使用金属，可以在IPD的一个或两个接口上控制寄生电气相互作用。 敏感器件组件主要是模拟电路元件，特别是RF电感元件。 在IPD布局中，可能受影响的组件与其他组件分离。 这允许实施选择性金属方法。 它还允许通过IC半导体芯片和IC芯片接地层的选择性放置来减少IPD衬底上的寄生相互作用。 在IPD MCM的优选实施例中，IPD衬底是多晶的。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：SG155842A1

公开(公告)日：2009-10-29

申请号：SG2009014895

申请日：2009-03-03

Applicant: SYCHIP INC

Inventor： DEGANI YINON ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LIGUO ,  CHENG JIAN

Abstract: Balun transformers are described wherein multiple transformer loops are implemented in a stacked design with the primary and secondary loops verlying one another. By aligning the loops in a vertical direction, instead of offsetting the loops, the area of the device is reduced. Multiple transformer loops are nested on each level, and the transformer loops on a given level are connected together using a crossover located on a different level.

公开(公告)号：SG141301A1

公开(公告)日：2008-04-28

申请号：SG2007048655

申请日：2007-06-28

Applicant: SYCHIP INC

Inventor： DEGANI YINON ,  CHEN YINCHAO ,  FAN YU ,  GAO CHARLEY CHUNLEI ,  SUN KUNQUAN ,  SUN LIGUO

Abstract: INTEGRATED PASSIVE DEVICES WITH HIGH Q INDUCTORS The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the base substrate, thus mating the two portions of the inductor. Using this approach, a two level inductor can be constructed without using a multilevel substrate. Using two two-level substrates yields a four-level flip bonded dual substrate inductor.