A FIELD CONTROLLED SEMICONDUCTOR DEVICE OF SIC AND A METHOD FOR PRODUCTION THEREOF
    6.
    发明申请
    A FIELD CONTROLLED SEMICONDUCTOR DEVICE OF SIC AND A METHOD FOR PRODUCTION THEREOF 审中-公开
    一种SIC的场控半导体器件及其制造方法

    公开(公告)号:WO9736313A3

    公开(公告)日:1997-11-20

    申请号:PCT/SE9700448

    申请日:1997-03-18

    Abstract: A field controlled semiconductor device of SiC comprises superimposed in the order mentioned at least a drain (12), a highly doped substrate layer (1) and a low doped n-type drift layer (2). It has also a highly doped n-type source region layer (6) and a source (11) connected thereto. A doped channel region layer (4) connects the source region layer to the drift layer, and a current is intended to flow therethrough when the device is in an on-state. The device has also a gate electrode (9). The channel region layer has a substantially lateral extension and is formed by a low doped n-type layer (4). The gate electrode (9) is arranged to influence the channel region layer from above for giving a conducting channel (17) created therein from the source region layer to the drift layer a substantially lateral extension.

    Abstract translation: SiC的场控半导体器件包括至少一个漏极(12),高度掺杂的衬底层(1)和低掺杂n型漂移层(2)的顺序叠加。 它还具有高度掺杂的n型源极区域层(6)和与其连接的源极(11)。 掺杂沟道区域层(4)将源极区域层连接到漂移层,并且当器件处于导通状态时,电流意图流过其中。 该器件还具有栅电极(9)。 沟道区域层具有基本上横向的延伸并且由低掺杂的n型层(4)形成。 栅电极(9)被布置成从上方影响沟道区层,用于从源区域层向漂移层产生导电沟道(17)大致横向延伸。

    A TRANSISTOR OF SIC
    7.
    发明申请
    A TRANSISTOR OF SIC 审中-公开
    SIC的晶体管

    公开(公告)号:WO9939389A3

    公开(公告)日:1999-10-28

    申请号:PCT/SE9900136

    申请日:1999-02-02

    CPC classification number: H01L29/7802 H01L29/1608 H01L29/41766 H01L29/7397

    Abstract: A transistor of SiC for high voltage and high switching frequency applications is a MISFET or an IGBT. This transistor comprises a plurality of laterally spaced active regions (16). The center to center distance of two adjacent active regions defines a lateral width of a cell of the transistor. The relation of the lateral width (Wa) of an accumulation region defined as the region in the drift layer connecting to a gate-insulating layer (11) in each individual cell and the lateral cell width (Wc) is selected so as to keep the power losses in the transistor as a consequence of switching below a determined proportion to the power losses relating to conduction of the transistor for a predetermined switching frequency and on-state voltage for which the transistor is designed.

    Abstract translation: 用于高电压和高开关频率应用的SiC晶体管是MISFET或IGBT。 该晶体管包括多个横向隔开的有源区(16)。 两个相邻有源区的中心距确定晶体管单元的横向宽度。 被定义为连接到每个单元中的栅极绝缘层(11)的漂移层中的区域的累积区域的横向宽度(Wa)和横向单元宽度(Wc)之间的关系被选择为保持 晶体管中的功率损耗是由于在确定的比例之下将功率损耗切换到预定的开关频率和晶体管所设计的导通状态下的晶体管的导通相关的功率损耗的结果。

Patent Agency Ranking