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公开(公告)号：DE69535691D1
公开(公告)日：2008-03-06
申请号：DE69535691
申请日：1995-09-27
Applicant: HITACHI LTD
Inventor： YAMADA TSUTOMU , KUROSAWA KENICHI , KAMINAGA YASUO , MASUI KOUJI , OHASHI AKIHIRO
Abstract: There is provided an input/output device having of not exerting any adverse influence on other expansion devices connected to a system bus at the time of insertion or removal. An expansion device 800 comprises an electronic circuit 400 and a MOS switch 300, and is connected to a system bus (BUS) via a connector having long and short pins. The expansion device 800 two power supply systems, namely a stable power supply 250 and an unstable power supply 260. At the time of insertion or removal of the expansion device 800, power is provided to the MOS switch 300 and a high impedance maintaining circuit from the stable power supply via a pair of long pins, so as to reliably place the MOS switch 300 in a high impedance state, inside the expansion device the high impedance maintaining circuit 350 drives an open/close control terminal, and power is provided to the electronic circuit 400 from the unstable power supply 260. At the time of insertion or removal, adverse influence is not exerted on the signal transmission on the system bus, and effects of load variation on the main power supply are reduced.
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公开(公告)号：DE69535691T2
公开(公告)日：2009-01-15
申请号：DE69535691
申请日：1995-09-27
Applicant: HITACHI LTD
Inventor： YAMADA TSUTOMU , KUROSAWA KENICHI , KAMINAGA YASUO , MASUI KOUJI , OHASHI AKIHIRO
Abstract: There is provided an input/output device having of not exerting any adverse influence on other expansion devices connected to a system bus at the time of insertion or removal. An expansion device 800 comprises an electronic circuit 400 and a MOS switch 300, and is connected to a system bus (BUS) via a connector having long and short pins. The expansion device 800 two power supply systems, namely a stable power supply 250 and an unstable power supply 260. At the time of insertion or removal of the expansion device 800, power is provided to the MOS switch 300 and a high impedance maintaining circuit from the stable power supply via a pair of long pins, so as to reliably place the MOS switch 300 in a high impedance state, inside the expansion device the high impedance maintaining circuit 350 drives an open/close control terminal, and power is provided to the electronic circuit 400 from the unstable power supply 260. At the time of insertion or removal, adverse influence is not exerted on the signal transmission on the system bus, and effects of load variation on the main power supply are reduced.
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公开(公告)号：DE69026845T2
公开(公告)日：1997-01-09
申请号：DE69026845
申请日：1990-01-24
Applicant: HITACHI LTD
Inventor： KUROSAWA KENICHI , SHIMADA MASARU , HIRAYAMA HIROKAZU , BANDOH TADAAKI , MORI KIYOMI
Abstract: High-speed inference method and system for a production system represented by an expert system. A knowledge base (16-3) comprised of a rule and a fact possessing a plurality of attributes is converted into machine language instructions executable by a processor (16-1) to execute inference. The machine language instruction of the fact has the function of transferring a value of the fact to a specified location and the machine language instruction of the rule has the function of performing matching decision by referring to the specified location. The number of pattern matching operations can be decreased and the interpretation overhead can be reduced to ensure high-speed inference.
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公开(公告)号：GB2129971B
公开(公告)日：1987-08-05
申请号：GB8324076
申请日：1983-09-08
Applicant: HITACHI LTD
Inventor： YONEDA KENJI , SAKAI KAZUHIRO , SAKAI YOSHIO , KUROSAWA KENICHI
Abstract: A plurality of characteristic modes represent traffic demand states occurring in a building in which the system is installed. When a detected traffic demand state coincides with one of the modes, operation of the system is controlled with the aid of control parameters determined thereby so that the currently detected traffic demand is processed in an optimal manner. The modes are stored and selectively read out in response to traffic demand detection. A mode creating and modifying capability accommodates new traffic demand states through a learning procedure, a mode being established by an automatic learning procedure in dependence on the results of evaluation of the traffic demand characteristic with regard to the significance, the time or period and continuity thereof. To this end, a disconnectable learning microcomputer is provided in addition to the system operation and car controlling microcomputers. Special modes can be manually input at a terminal.
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公开(公告)号：DE69032812T2
公开(公告)日：1999-04-29
申请号：DE69032812
申请日：1990-07-06
Applicant: HITACHI LTD
Inventor： KUROSAWA KENICHI , TANAKA SHIGEYA , NAKATSUKA YASUHIRO , BANDOH TADAAKI
IPC: G06F9/318 , G06F9/38 , G06F12/08 , G06F15/177
Abstract: The described parallel processing apparatus and method turns a processing state discrimination flag (PE, 116) off, increases a program count by 1 at a time, reads out one instruction, and processes that instruction in an arithmetic unit, when it executes successivc processing of conventional software, and when it executes parallel processing of new software turns the processing state discrimination flag (PE, 116) on, increases the program count by m at a time, reads out m instructions, and exercises parallel processing over m instructions in m arithmetic units. In order to select either of the above described two kinds of processing, a discrimination changeover instruction having function of changing over the processing state discrimination flag (PE, 116) is added. The instructions are processed in one or in m arithmetic unit(s) (108, 109) in accordance with the processing state discrimination flag. In this way, successive processing and parallel processing are provided with compatibility and are selectively executed.
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Patent Agency Ranking
公开(公告)号：HK30488A
公开(公告)日：1988-05-06
申请号：HK30488
申请日：1988-04-28
Applicant: HITACHI LTD
Inventor： YONEDA KENJI , SAKAI KAZUHIRO , SAKAI YOSHIO , KUROSAWA KENICHI
Abstract: A plurality of characteristic modes represent traffic demand states occurring in a building in which the system is installed. When a detected traffic demand state coincides with one of the modes, operation of the system is controlled with the aid of control parameters determined thereby so that the currently detected traffic demand is processed in an optimal manner. The modes are stored and selectively read out in response to traffic demand detection. A mode creating and modifying capability accommodates new traffic demand states through a learning procedure, a mode being established by an automatic learning procedure in dependence on the results of evaluation of the traffic demand characteristic with regard to the significance, the time or period and continuity thereof. To this end, a disconnectable learning microcomputer is provided in addition to the system operation and car controlling microcomputers. Special modes can be manually input at a terminal.
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公开(公告)号：HK63587A
公开(公告)日：1987-09-11
申请号：HK63587
申请日：1987-09-03
Applicant: HITACHI LTD
Inventor： KUZUNIKI SOSHIRO , HIRASAWA KOTARO , KUROSAWA KENICHI , KANEKO TAKASHI
Abstract: A control system for group- controlling lift cars has means (M1) for selecting a car to serve a hall call as a function of a waiting time and a power consumption and an evaluation function having a variable parameter alpha for varying the relative weights of the waiting time and the power consumption, and simulation means (M2) equivalent to the car selection means. M2 computes a variable parameter ???1, ???2 which satisfies an instructed power consumption target value Pm and selects a car to serve the hall call based on the computed variable parameter ???1, ???2, so that a highly efficient lift car service is provided.
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公开(公告)号：DE69032812D1
公开(公告)日：1999-01-21
申请号：DE69032812
申请日：1990-07-06
Applicant: HITACHI LTD
Inventor： KUROSAWA KENICHI , TANAKA SHIGEYA , NAKATSUKA YASUHIRO , BANDOH TADAAKI
IPC: G06F9/318 , G06F9/38 , G06F12/08 , G06F15/177
Abstract: The described parallel processing apparatus and method turns a processing state discrimination flag (PE, 116) off, increases a program count by 1 at a time, reads out one instruction, and processes that instruction in an arithmetic unit, when it executes successivc processing of conventional software, and when it executes parallel processing of new software turns the processing state discrimination flag (PE, 116) on, increases the program count by m at a time, reads out m instructions, and exercises parallel processing over m instructions in m arithmetic units. In order to select either of the above described two kinds of processing, a discrimination changeover instruction having function of changing over the processing state discrimination flag (PE, 116) is added. The instructions are processed in one or in m arithmetic unit(s) (108, 109) in accordance with the processing state discrimination flag. In this way, successive processing and parallel processing are provided with compatibility and are selectively executed.
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公开(公告)号：DE4225228C2
公开(公告)日：1997-05-15
申请号：DE4225228
申请日：1992-07-30
Applicant: HITACHI LTD , HITACHI ENG CO LTD
Inventor： MIURA SHUUICHI , KUROSAWA KENICHI , NAKAMIKAWA TETSUAKI , HIROSE KENJI
Abstract: A prefetch buffer adapted to be installed between a cache memory and a main memory in a computer system having a CPU. The prefetch buffer includes a buffer storage having at least one entry for storing prefetched data and an address tag, which is to be used for searching the data, as a pair; a data searcher for searching, from the data stored in the buffer storage, for data having an address requested by the CPU; and an address estimator for determining an address of data to be prefetched next from the main memory, based on the address requested by the CPU and also on a history of the addresses of data prefetched in the past from the main memory; and an address generator for generating an address of data to be prefetched from the main memory. With this arrangement, it is possible to improve the hit ratio of the prefetch buffer regardless of the direction in which the access address varies.
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公开(公告)号：DE69026845D1
公开(公告)日：1996-06-13
申请号：DE69026845
申请日：1990-01-24
Applicant: HITACHI LTD
Inventor： KUROSAWA KENICHI , SHIMADA MASARU , HIRAYAMA HIROKAZU , BANDOH TADAAKI , MORI KIYOMI
Abstract: High-speed inference method and system for a production system represented by an expert system. A knowledge base (16-3) comprised of a rule and a fact possessing a plurality of attributes is converted into machine language instructions executable by a processor (16-1) to execute inference. The machine language instruction of the fact has the function of transferring a value of the fact to a specified location and the machine language instruction of the rule has the function of performing matching decision by referring to the specified location. The number of pattern matching operations can be decreased and the interpretation overhead can be reduced to ensure high-speed inference.
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