公开(公告)号：JP2002344307A

公开(公告)日：2002-11-29

申请号：JP2001143783

申请日：2001-05-14

Applicant: FUJITSU LTD ,  NEC CORP ,  INT SUPERCONDUCTIVITY TECH

Inventor： SUZUKI HIDEO ,  NAGASAWA SHUICHI ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H01L39/22 ,  H03K19/195

Abstract: PROBLEM TO BE SOLVED: To stabilize the operation of a single flux quantum logic circuit to improve the degree of freedom in circuit design. SOLUTION: A superconductor quantum interference element including a fifth and sixth Josephson junctions JL5 , JL6 is formed so as to make a second inductance magnetic field coupling to provide the element on an output circuit part in a single flux quantum logic circuit 10.

公开(公告)号：JP2001077667A

公开(公告)日：2001-03-23

申请号：JP25143899

申请日：1999-09-06

Applicant: HITACHI LTD ,  INT SUPERCONDUCTIVITY TECH ,  TOSHIBA CORP ,  NEC CORP

Inventor： HASEGAWA HARUHIRO ,  MIYAHARA KAZUNORI ,  HASHIMOTO TATSUNORI ,  NAGASAWA SHUICHI ,  ENOMOTO YOICHI

IPC: H03H17/00 ,  H03H17/02 ,  H03H17/06

Abstract: PROBLEM TO BE SOLVED: To enable high-speed operation by generating on a signal line a pulse which is delayed an integral multiple of a clock behind an input signal pulse by a circuit block, composed of a shunt and a delay unit and counting pulses which are generated in a time, which is an integral multiple of the clock by a circuit block composed of a confluence unit and a counter. SOLUTION: Shunts 114 to 116, consisting of Josephson junctions and inductors, receive input signal pulses and shunt them to signal lines 117 to 119 and delay units 111 to 113. Then a 1st circuit block 11 generate on signal lines 117 to 1110 delayed pulses, which are as many as a decimation factor, e.g. '4'. In a 2nd circuit block, confluence units 122 to 124, consisting of Josephson junctions and inductors count and send delay pulses which are as many as the decimation factor '4' to a counter 121. The counter 121 is composed of a series connection of toggle flip-flops and holds its count result in cycles, which are 1/4 as long as the clock frequency.

公开(公告)号：JP2000260187A

公开(公告)日：2000-09-22

申请号：JP5937699

申请日：1999-03-05

Applicant: NEC CORP ,  INT SUPERCONDUCTIVITY TECH

Inventor： NAGASAWA SHUICHI ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: G11C11/44

Abstract: PROBLEM TO BE SOLVED: To substantially reduce a necessary AC bias current by using an effective combination of an AC type logical circuit biased by an AC current and a fluxoid type logic circuit biased by a DC current. SOLUTION: A 256 RAM block construction comprises a memory cell with 16 row and 16 columns, a voltage type logic driver circuit and sense circuit composed of superconductive latching elements biased by an AC current, and a fluxoid type logic decoder circuit composed of a superconductive single fluxoid quantum (FSQ) biased by a DC current. An AC power used for the whole RAMs can largely be reduced by arranging the decoder circuit part to be a fluxoid type logic circuit biased by a DC current, and an increase in AC power consumption in the driver circuit can be absorbed by adopting a multi-driver system.

公开(公告)号：JP2001251179A

公开(公告)日：2001-09-14

申请号：JP2000063366

申请日：2000-03-03

Applicant: FUJITSU LTD ,  INT SUPERCONDUCTIVITY TECH

Inventor： SUZUKI HIDEO ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H01L39/22 ,  H03K19/195

Abstract: PROBLEM TO BE SOLVED: To prevent a bias current supplied to a Josephson junction from flowing to a circuit adjacent to the Josephson junction and from interfering. SOLUTION: A single magnetic flux quantum basic logic gate 10 is conencted to a single magnetic flux quantum basic logic gate 11 through a Josephson transfer line 13. In the Josephson transfer line 13, a resistor R1 is connected in series to an inductance L1. The value R of the resistor R1 is decided so that the time constant L/R of the series connection circuit of the superconducting inductance L1 with a value L and the resistor R1 becomes larger than a switching time and it satisfies R

公开(公告)号：JP2001119300A

公开(公告)日：2001-04-27

申请号：JP29454099

申请日：1999-10-15

Applicant: TOSHIBA CORP ,  INT SUPERCONDUCTIVITY TECH ,  NEC CORP ,  HITACHI LTD ,  FUJITSU LTD

Inventor： HASHIMOTO TATSUNORI ,  NAGASAWA SHUICHI ,  HASEGAWA HARUHIRO ,  SUZUKI HIDEO ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H03M1/12 ,  H03M3/02

Abstract: PROBLEM TO BE SOLVED: To provide a superconducting sigma delta modulator which realize a high-resolution AD converter. SOLUTION: In the superconducting sigma delta converter, it is necessary that a time constant Ls/Rs of an integrator is sufficiently high in order to avoiding evils like a failure to raise the resolution or degradation of the linearity, however Ls cannot be made sufficiently large because it is necessary that a feedback quantity Φ0/L0 (Φ0: magnetic flux quantum) is not buried in the thermal noise from an overdamping Josephson element 4 of a comparator. In order to resolve this problem, a Josephson transmission line including an underdamping Josephson element is used as a magnetic flux quantum pair generation circuit 20; and when the Josephson element 4 of the comparator exceeds a threshold to output one single magnetic flux quantum, the magnetic flux quantum is multiplied in this circuit 20 to feed back plural single magnetic flux quanta to the integrator. Ls and the time constant are made sufficiently large in accordance with by increase in the feedback quantity to realize a high resolution.

公开(公告)号：JPH11112044A

公开(公告)日：1999-04-23

申请号：JP26580097

申请日：1997-09-30

Applicant: INT SUPERCONDUCTIVITY TECH ,  MITSUBISHI ELECTRIC CORP ,  NEC CORP

Inventor： YUYA NAOKI ,  SUZUKI KATSUMI ,  ENOMOTO YOICHI ,  BUN TAKEKUNI

IPC: H01L39/22 ,  H01L39/24

Abstract: PROBLEM TO BE SOLVED: To form a uniform joint with high reproducibility while suppressing fluctuation by machining a substrate into a desired shape by varying the irradiation quantity of a focused ion beam depending on the position of a groove made in the substrate such that the groove is shaped optimally for formation of the joint. SOLUTION: A thin metal film 8 is deposited an MgO substrate 1 and a joint forming part is irradiated with a Ga ion beam by means of a focused ion beam system. Machining is performed while varying ion irradiation in three steps at a beam pitch of 30 nm such that ion irradiation is maximized in the center of the groove thus forming the inclining part (regions a, b) of the groove 3 having a constant inclination angle over a wide range. Since the angle of the groove can be set optimally by varying ion irradiation and beam pitch depending on the position of the groove and the inclining face can be adjusted to have a constant angle, a uniform joint can be formed with high reproducibility while suppressing fluctuation.

公开(公告)号：JP2003264458A

公开(公告)日：2003-09-19

申请号：JP2002061425

申请日：2002-03-07

Applicant: NEC CORP ,  INT SUPERCONDUCTIVITY TECH

Inventor： NAGASAWA SHUICHI ,  TAKAHASHI KAZUHIRO ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H01L39/22 ,  H03K19/195 ,  H03K19/21

Abstract: PROBLEM TO BE SOLVED: To provide a superconducting single magnetic flux quantum multi-input exclusive OR circuit which can be operated at high speed without increasing the number of logic stages. SOLUTION: In the conventional superconducting single magnetic flux quantum two input exclusive OR circuit having a function that performs arithmetic operations of exclusive OR to a first input signal and a second input signal and outputs the result to an output end, it is constituted so that it has functions that perform arithmetic operations of exclusive OR to the first, second and third input signals and output the results on the output end by further providing an input circuit for inputting at least one or more third input signals in addition to the first and second input signals and providing the input circuit with a function that delays the phase of the third input signal to the phases of the first and second input signals in a desired time. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2001251178A

公开(公告)日：2001-09-14

申请号：JP2000063365

申请日：2000-03-03

Applicant: FUJITSU LTD ,  INT SUPERCONDUCTIVITY TECH

Inventor： SUZUKI HIDEO ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H01F6/06 ,  H03K19/195

Abstract: PROBLEM TO BE SOLVED: To eliminate unnecessary magnetic flux without transmitting it to the circuit of a next stage with simple constitution. SOLUTION: A single magnetic flux quantum basic logic gate 10 is conencted to a single magnetic flux quantum basic logic gate 11 through a magnetic flux escape circuit 13A. In the magnetic flux escape circuit 13A, a Josephson junction J1S is connected between an inductance L1 and a Josephson junction J1 and a DC bias current IB2 which can be turned on/off independent of a DV bias current IB1 supplied to the logic gates 10 and 11 is supplied to the Josephson junction J1. When an SFQ pulse is supplied to the inductance L1 in a state where the DC bias current IB2 is turned off, the critical current of the Josephson junction J1S is designed smaller than that of the Josephson junction J1 for switching the Josephson junction J1S and for preventing the switching of the Josephson junction J1 A resistor or the series connection circuit of the resistor and the Josephson junction can be connected instead of the Josephson junction J1S.

公开(公告)号：JP2002187798A

公开(公告)日：2002-07-05

申请号：JP2000380770

申请日：2000-12-14

Applicant: INT SUPERCONDUCTIVITY TECH ,  NEC CORP ,  KYOCERA CORP

Inventor： TAKI KENJI ,  SUZUKI KATSUMI ,  SUZUKI TAKEO ,  ENOMOTO YOICHI

IPC: C30B29/22 ,  H01L39/22

Abstract: PROBLEM TO BE SOLVED: To provide an oxide super conductive thin film laminated substrate, in which the lowering of the critical temperature Tc is effectively suppressed, excellent super conductive characteristic is exhibited, the increase of the damping of signal is effectively suppressed even in the case of transmitting a high frequency signal to a YBCO film, the film breaking or the like of the YBCO thin film in a step part is effectively prevented even at the time of multiply laminating the YBCO thin film and the YBCO film is surely electrically connected, in the oxide superconductive thin film laminated substrate having the YBCO thin film formed through a buffer layer on an insulating substrate of an amorphous insulating material having low dielectric constant and composed of SiO2. SOLUTION: The oxide superconductive thin film composed of a copper oxide super conductor, in which the atomic ratio of Y:Ba:Cu is 1:2:3, and having crystallinity c-axis-oriented in a direction vertical to the substrate is formed through the platinum(Pt) buffer layer having >=40 Å, particularly >=140 Åto

公开(公告)号：JP2002094370A

公开(公告)日：2002-03-29

申请号：JP2000279137

申请日：2000-09-14

Applicant: NEC CORP ,  INT SUPERCONDUCTIVITY TECH

Inventor： NAGASAWA SHUICHI ,  MIYAHARA KAZUNORI ,  ENOMOTO YOICHI

IPC: H01L39/22 ,  H01L39/02 ,  H03K19/195

Abstract: PROBLEM TO BE SOLVED: To provide a superconducting semiconductor hybrid integrated circuit that attains an ultra-high speed operation of several GHz or higher with low power consumption, by effectively combining the advantages of a superconducting circuit with the advantages of a semiconductor circuit. SOLUTION: The hybrid integrated circuit includes a circuit 13 consisting of a superconducting element, a circuit 12 consisting of a semiconductor element and a DC power supply line 11, the circuit 12 consisting of the semiconductor element is inserted between a bias line of the circuit 13 consisting of the superconducting element and the DC power supply line 11 and the circuit 12 consisting of the semiconductor element acts as a switch to supply bias current to the circuit 13 consisting of the superconducting element.