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    Bit range isolation instruction, method, and apparatus
    5.
    发明专利
    Bit range isolation instruction, method, and apparatus 有权
    BIT RANGE隔离指令，方法和设备

    公开(公告)号：JP2011134304A

    公开(公告)日：2011-07-07

    申请号：JP2010255319

    申请日：2010-11-15

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： LOKTYUKHIN MAXIM ,  MAHURIN ERIC ,  TOLL BRET L ,  DIXON MARTIN G ,  MIRKES SEAN P ,  KREITZER DAVID L ,  OULD-AHMED-VALL EL MOUSTAPHA ,  GOPAL VINODH

    IPC: G06F9/305

    CPC classification number: G06F9/30145 ,  G06F9/30018 ,  G06F9/30029 ,  G06F9/30094 ,  G06F9/3802

    Abstract: PROBLEM TO BE SOLVED: To provide bit manipulation instruction that increases processing speed. SOLUTION: An instruction indicating a source operand and a destination operand is received (101). A result is stored in the destination operand in response to the instruction. The result operand may have: a first range of bits having a first end explicitly specified by the instruction, in which each bit is identical in value to a bit of the source operand in a corresponding position; and a second range of bits that all have a same value regardless of values of bits of the source operand in corresponding positions (102). Execution of an instruction may complete without moving the first range of the result relative to the bits of identical value in the corresponding positions of the source operand, regardless of the location of the first range of bits in the result (103). COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供提高处理速度的位操作指令。

    解决方案：接收指示源操作数和目的操作数的指令（101）。 结果存储在目标操作数中以响应指令。 结果操作数可以具有：具有由指令明确指定的第一端的第一范围的位，其中每个位在相应位置处的值与源操作数的位相同; 以及与对应位置（102）中的源操作数的位的值无关的所有位都具有相同值的第二范围。 不管移动结果相对于源操作数的相应位置的相同位的位的结果的第一范围，结果（103）中的第一位的位置如何，都可以完成指令的执行。 版权所有（C）2011，JPO＆INPIT

    Bit range isolation instructions, methods, and apparatus
    7.
    发明专利
    Bit range isolation instructions, methods, and apparatus 有权
    双向隔离说明书，方法和设备

    公开(公告)号：JP2014081953A

    公开(公告)日：2014-05-08

    申请号：JP2014001946

    申请日：2014-01-08

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： LOKTYUKHIN MAXIM ,  MAHURIN ERIC ,  TOLL BRET L ,  DIXON MARTIN G ,  MIRKES SEAN P ,  KREITZER DAVID L ,  OULD-AHMED-VALL EL MOUSTAPHA ,  GOPAL VINODH

    IPC: G06F9/315 ,  G06F9/305

    CPC classification number: G06F9/30145 ,  G06F9/30018 ,  G06F9/30029 ,  G06F9/30094 ,  G06F9/3802

    Abstract: PROBLEM TO BE SOLVED: To provide a bit manipulation instruction with a high processing speed.SOLUTION: An instruction indicating a source operand and a destination operand is received (101). A result is stored in the destination operand in response to the instruction. The result operand may have: first range of bits having a first end explicitly specified by the instruction in which each bit is identical in value to a bit of the source operand in a corresponding position; and second range of bits that all have a same value regardless of values of bits of the source operand in corresponding positions (102). Execution of instruction may complete without moving the first range of the result relative to the bits of identical value in the corresponding positions of the source operand, regardless of the location of the first range of bits in the result (103).

    Abstract translation: 要解决的问题：提供具有高处理速度的位操作指令。解决方案：接收指示源操作数和目的地操作数的指令（101）。 结果存储在目标操作数中以响应指令。 结果操作数可以具有：第一范围的位具有由指令中明确指定的第一端，其中每个位在值相对于相应位置中的源操作数的位相同; 以及与相应位置（102）中的源操作数的位的值无关的所有位都具有相同值的第二范围。 无论在结果（103）中的第一个比特位的位置如何，执行指令都可以完成相对于源操作数的相应位置相对于相同值的比特移动结果的第一范围。

    Addition instruction to add three source operands
    8.
    发明专利
    Addition instruction to add three source operands 有权
    添加指令三种来源操作

    公开(公告)号：JP2014038664A

    公开(公告)日：2014-02-27

    申请号：JP2013243794

    申请日：2013-11-26

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： GOPAL VINODH ,  GUILFORD JAMES D ,  WOLRICH GILBERT M ,  FEGHALI WAJDI K ,  OZTURK ERDINC ,  DIXON MARTIN G ,  MIRKES SEAN P ,  TOLL BRET L ,  LOKTYUKHIN MAXIM ,  DAVIS MARK C ,  FARCY ALEXANDRE

    IPC: G06F9/305

    CPC classification number: G06F9/3001 ,  G06F9/30094

    Abstract: PROBLEM TO BE SOLVED: To provide a new instruction that adds three source operands.SOLUTION: A method may comprise receiving an addition instruction. The addition instruction may indicate a first source operand, a second source operand and a third source operand. A sum of the first, second and third source operands may be stored as result of the addition instruction. The sum may be partly stored in a destination operand indicated by the addition instruction and may be partly stored in a plurality of flags. The instructions on other methods, apparatuses, systems, and machine-readable media are also included.

    Abstract translation: 要解决的问题：提供添加三个源操作数的新指令。解决方案：一种方法可以包括接收加法指令。 加法指令可以指示第一源操作数，第二源操作数和第三源操作数。 可以作为加法指令的结果存储第一，第二和第三源操作数的总和。 总和可以部分地存储在由加法指令指示的目的地操作数中，并且可以部分地存储在多个标志中。 还包括有关其他方法，装置，系统和机器可读介质的说明。

    Add instructions to add three source operands
    9.
    发明专利
    Add instructions to add three source operands 有权
    添加三条操作手册的说明

    公开(公告)号：JP2011134305A

    公开(公告)日：2011-07-07

    申请号：JP2010256162

    申请日：2010-11-16

    Applicant: Intel Corp ,  インテル・コーポレーション

    Inventor： GOPAL VINODH ,  GUILFORD JAMES D ,  WOLRICH GILBERT M ,  FEGHALI WAJDI K ,  OZTURK ERDINC ,  DIXON MARTIN G ,  MIRKES SEAN P ,  TOLL BRET L ,  LOKTYUKHIN MAXIM ,  DAVIS MARK C ,  FARCY ALEXANDRE

    IPC: G06F9/30

    CPC classification number: G06F9/3001 ,  G06F9/30094

    Abstract: PROBLEM TO BE SOLVED: To provide a new instruction that adds three source operands. SOLUTION: A method may include receiving an add instruction. The add instruction may indicate a first source operand, a second source operand and a third source operand. A sum of the first, second and third source operands may be stored as a result of the add instruction. The sum may be partly stored in a destination operand indicated by the add instruction and may be partly stored in a plurality of flags. The instructions on other methods, apparatuses, systems, and machine-readable mediums are included. COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供添加三个源操作数的新指令。 解决方案：一种方法可以包括接收添加指令。 加法指令可以指示第一源操作数，第二源操作数和第三源操作数。 作为加法指令的结果，可以存储第一，第二和第三源操作数的和。 总和可以部分地存储在由加法指令指示的目的地操作数中，并且可以部分地存储在多个标志中。 包括其他方法，装置，系统和机器可读介质上的说明。 版权所有（C）2011，JPO＆INPIT

    DETERMINING A MESSAGE RESIDUE
    10.
    发明申请
    DETERMINING A MESSAGE RESIDUE 审中-公开
    确定消息剩余

    公开(公告)号：WO2009012050A2

    公开(公告)日：2009-01-22

    申请号：PCT/US2008068801

    申请日：2008-06-30

    Applicant: INTEL CORP ,  GUERON SHAY ,  GOPAL VINODH ,  FEGHALI WAJDI K ,  WOLRICH GILBERT

    Inventor： GUERON SHAY ,  GOPAL VINODH ,  FEGHALI WAJDI K ,  WOLRICH GILBERT

    IPC: G06F7/52

    CPC classification number: H03M13/091

    Abstract: A technique of determining a message residue includes accessing a message and simultaneously determining a set of modular remainders with respect to a polynomial for different respective segments of the message. The technique also includes determining a modular remainder with respect to the polynomial for the message based on the set of modular remainders and a set of constants determined prior to accessing the message. The modular remainder with respect to the polynomial for the message is stored in a memory.

    Abstract translation: 确定消息余数的技术包括访问消息并同时针对消息的不同相应段针对多项式确定一组模块余数。 该技术还包括基于在访问消息之前确定的一组模块余数和一组常量来确定关于消息的多项式的模余数。 关于消息多项式的模余数存储在存储器中。

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