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1.发明申请公开(公告)号：US20180300841A1
公开(公告)日：2018-10-18
申请号：US15488842
申请日：2017-04-17
Applicant: Intel Corporation
Inventor： Travis T. Schluessler , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Altug Koker , Jacek Kwiatkowski , Ingo Wald , Jefferson Amstutz , Johannes Guenther , Gabor Liktor , Elmoustapha Ould-Ahmed-Vall
Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
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公开(公告)号：US12198250B2
公开(公告)日：2025-01-14
申请号：US16819116
申请日：2020-03-15
Applicant: Intel Corporation
Inventor： Johannes Guenther , Attila Tamas Afra
IPC: G06T15/06 , G06F7/485 , G06F7/487 , G06F7/499 , G06F7/57 , G06F9/30 , G06T1/20 , G06T15/00 , G06T17/10
Abstract: Apparatus and method for double-precision traversal and intersection. For example, one embodiment of an apparatus comprises: a bounding volume hierarchy (BVH) generator to construct a BVH comprising a plurality of hierarchically arranged BVH nodes; a ray storage to store rays to be traversed through one or more of the BVH nodes; ray traversal circuitry comprising a first plurality of 64-bit arithmetic logic units (ALUs) which natively support double-precision floating point operations, the ray traversal circuitry to use at least a first ALU of the one or more ALUs to traverse a first ray through a first BVH node at a double-precision floating point precision to generate double-precision floating point traversal results; a plurality of execution units (EUs) coupled to the ray traversal circuitry, at least one of the plurality of EUs comprising a second plurality of 64-bit ALUs capable of natively performing double-precision floating point operations, the at least one of the plurality of EUs to execute one or more intersection shaders to perform ray-primitive intersection testing at double-precision floating point precision based on the double-precision floating point traversal results.
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3.发明授权公开(公告)号：US10977853B2
公开(公告)日：2021-04-13
申请号：US16791719
申请日：2020-02-14
Applicant: Intel Corporation
Inventor： Ingo Wald , Gabor Liktor , Carsten Benthin , Carson Brownlee , Johannes Guenther , Jefferson D. Amstutz
Abstract: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.
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公开(公告)号：US10922790B2
公开(公告)日：2021-02-16
申请号：US16230501
申请日：2018-12-21
Applicant: Intel Corporation
Inventor： Carson Brownlee , Ingo Wald , Attila Afra , Johannes Guenther , Jefferson Amstutz , Carsten Benthin
Abstract: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.
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公开(公告)号：US10861216B2
公开(公告)日：2020-12-08
申请号：US15482709
申请日：2017-04-07
Applicant: Intel Corporation
Inventor： Carsten Benthin , Ingo Wald , Gabor Liktor , Johannes Guenther , Elmoustapha Ould-Ahmed-Vall
Abstract: An apparatus and method for performing BVH compression and decompression concurrently with stores and loads, respectively. For example, one embodiment comprises: bounding volume hierarchy (BVH) construction circuitry to build a BVH based on a set of input primitives, the BVH comprising a plurality of uncompressed coordinates; traversal/intersection circuitry to traverse one or more rays through the BVH and determine intersections with the set of input primitives using the uncompressed coordinates; store with compression circuitry to compress the BVH including the plurality of uncompressed coordinates to generate a compressed BVH with compressed coordinates and to store the compressed BVH to a memory subsystem; and load with decompression circuitry to decompress the BVH including the compressed coordinates to generate a decompressed BVH with the uncompressed coordinates and to load the decompressed BVH with uncompressed coordinates to a cache and/or a set of registers accessible by the traversal/intersection circuitry.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11436785B2
公开(公告)日：2022-09-06
申请号：US17223395
申请日：2021-04-06
Applicant: Intel Corporation
Inventor： Ingo Wald , Gabor Liktor , Carsten Benthin , Carson Brownlee , Johannes Guenther , Jefferson D. Amstutz
Abstract: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.
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公开(公告)号：US11257180B2
公开(公告)日：2022-02-22
申请号：US16929790
申请日：2020-07-15
Applicant: Intel Corporation
Inventor： Travis T. Schluessler , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Altug Koker , Jacek Kwiatkowski , Ingo Wald , Jefferson Amstutz , Johannes Guenther , Gabor Liktor , Elmoustapha Ould-Ahmed-Vall
Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
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公开(公告)号：US20210035270A1
公开(公告)日：2021-02-04
申请号：US16929787
申请日：2020-07-15
Applicant: Intel Corporation
Inventor： Tomer Bar-On , Hugues Labbe , Adam T. Lake , Kai Xiao , Ankur N. Shah , Johannes Guenther , Abhishek R. Appu , Joydeep Ray , Deepak S. Vembar , ElMoustapha Ould-Ahmed-Vall
Abstract: Systems, apparatuses and methods may provide for technology that identifies, at an image post-processor, unresolved surface data and identifies, at the image post-processor, control data associated with the unresolved surface data. Additionally, the technology may resolve, at the image post-processor, the unresolved surface data and the control data into a final image.
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公开(公告)号：US20210027416A1
公开(公告)日：2021-01-28
申请号：US16929790
申请日：2020-07-15
Applicant: Intel Corporation
Inventor： Travis T. Schluessler , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Altug Koker , Jacek Kwiatkowski , Ingo Wald , Jefferson Amstutz , Johannes Guenther , Gabor Liktor , Elmoustapha Ould-Ahmed-Vall
Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
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公开(公告)号：US11670035B2
公开(公告)日：2023-06-06
申请号：US16819124
申请日：2020-03-15
Applicant: Intel Corporation
Inventor： Attila Tamas Afra , Johannes Guenther
CPC classification number: G06T15/005 , G06T5/002 , G06T7/20 , G06T15/06 , G06T2207/10016
Abstract: Apparatus and method for non-local means filtering using a media processing block of a graphics processor. For example, one embodiment of a processor comprises: ray tracing circuitry to execute a first set of one or more commands to traverse rays through a bounding volume hierarchy (BVH) to identify BVH nodes and/or primitives intersected by the ray; shader execution circuitry to execute one or more shaders responsive to a second set of one or more commands to render a sequence of image frames based on the BVH nodes and/or primitives intersected by the ray; and a media processor comprising motion estimation circuitry to execute a third set of one or more commands to perform non-local means filtering to remove noise from the sequence of image frames based on a mean pixel value collected across the sequence of image frames.
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