One-line synchronous interface
    1.
    发明授权

    公开(公告)号:US11855800B1

    公开(公告)日:2023-12-26

    申请号:US17902139

    申请日:2022-09-02

    CPC classification number: H04L12/40013 H04L7/06

    Abstract: Methods and system for one-line synchronous interface are described. A timing device including a first buffer can be connected to a line card including a second buffer. The timing device can control the first buffer to output a synchronization pulse to the line card periodically at a time interval. For each output of the synchronization pulse, the timing device can switch the first buffer from a first output mode to a first input mode. Under the first input mode, the timing device listen for incoming data on the trace. The line card can receive the synchronization pulse periodically at the time interval. For each receipt of the synchronization pulse, the line card can switch the second buffer from a second input mode to a second output mode. Under the second output mode, the line card can transmit outgoing data on the trace.

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