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公开(公告)号:US12163782B2
公开(公告)日:2024-12-10
申请号:US17303191
申请日:2021-05-24
Applicant: Infineon Technologies AG
Inventor: Friedrich Rasbornig , Wolfgang Granig , Dirk Hammerschmidt , Benjamin Kollmitzer , Bernhard Schaffer
Abstract: An angle sensor may include a first angle measurement path to determine an angular position based on sensor values from a first set of sensing elements. The angle sensor may include a second angle measurement path to determine the angular position based on sensor values from a second set of sensing elements. A type of the second set of sensing elements is different from a type of the first set of sensing elements. The angle sensor may include a safety path to perform a set of safety checks, the set of safety checks including a first vector length check associated with the first angle measurement path and a second vector length check associated with the second angle measurement path. The angle sensor may include an output component to provide an indication of a result of the set of safety checks.
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公开(公告)号:US20240407062A1
公开(公告)日:2024-12-05
申请号:US18325586
申请日:2023-05-30
Applicant: Infineon Technologies AG
Inventor: Christos Konstantopoulos , Enrico Tonazzo , Maurizio Galvano , Mattia Montoncelli , Federico Cusinato
IPC: H05B45/345 , G05F1/46 , G05F1/565 , H05B45/48
Abstract: Regulator circuitry configured to manage power supply ripple using an adaptive loop gain that offers ripple rejection performance related to the ripple magnitude for a negative closed loop of the regulator circuitry. The power supply regulator circuitry of this disclosure includes an error amplifier in the closed loop and an adaptive loop gain circuitry. The adaptive loop gain circuit removes a DC component of the sensed output and feeds the sensed output, including the output ripple, to peak detector circuitry to obtain a Vpeak signal. The Vpeak signal output from the peak detector circuitry is a continuous signal that tracks the wave peak. The circuit arrangement multiplies the output of the error amplifier by the signal Vpeak resulting in improved power supply ripple rejection as the ripple amplitude increases. To avoid control signal with zero value during times that the peak-to-peak value of the sensed voltage.
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公开(公告)号:US20240405763A1
公开(公告)日:2024-12-05
申请号:US18327525
申请日:2023-06-01
Applicant: Infineon Technologies AG
Inventor: Valentyn Solomko , Semen Syroiezhin , Andreas Bänisch
IPC: H03K17/10 , H03K17/687 , H03K19/0185
Abstract: An RF switch device includes transistors coupled in series to form a current path; a drain-source resistive bias network coupled to a drain and a source of each transistor; and a discharge switch coupled between a gate of at least one transistor and the drain-source resistive bias network, wherein the discharge switch establishes a current path between the gate of the at least one transistor and the drain-source resistive bias network only during a switching transient of the RF switch device.
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公开(公告)号:US20240405094A1
公开(公告)日:2024-12-05
申请号:US18800308
申请日:2024-08-12
Applicant: Infineon Technologies AG
Inventor: Frank Pfirsch
IPC: H01L29/51 , H01L29/40 , H01L29/739 , H01L29/78
Abstract: A power transistor is formed by a plurality of transistor cells electrically connected in parallel. Each transistor cell includes a gate structure including a gate electrode coupled to a control terminal and a gate dielectric stack, the gate dielectric stack including a ferroelectric insulator. A method of operating the power transistor includes: switching the power transistor in a normal operating mode by applying a switching control signal to the control terminal, the switching control signal having a maximum voltage and a minimum voltage; and setting the ferroelectric insulator into a defined polarization state by applying a first voltage pulse to the control terminal, the first voltage pulse exceeding the maximum voltage of the switching control signal.
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公开(公告)号:US20240404983A1
公开(公告)日:2024-12-05
申请号:US18800474
申请日:2024-08-12
Applicant: Infineon Technologies AG
Inventor: Mark Pavier
IPC: H01L23/00
Abstract: A method for fabricating a semiconductor device includes: providing a carrier; providing first and second external contacts; providing a semiconductor die including a first main face, a second main face opposite to the first main face, a first contact pad disposed on the first main face, a second contact pad disposed on the second main face, and a vertical transistor; disposing the semiconductor die with the first main face onto the carrier; connecting a wire with the second external contact; and connecting a clip between the second contact pad and the first external contact. Connecting the wire is carried out before connecting the clip.
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公开(公告)号:US20240404982A1
公开(公告)日:2024-12-05
申请号:US18205180
申请日:2023-06-02
Applicant: Infineon Technologies AG
Inventor: Marian Sebastian Broll , Daniel Obermeier , Florian Alexander Biermann
IPC: H01L23/00 , H01L21/607 , H01L23/495 , H01L25/065
Abstract: A power semiconductor module includes: a first substrate; a first power semiconductor die attached to the first substrate; and a first metallic clip having a plurality of first contact regions ultrasonically welded to either a first metallic region of the first substrate or a first metallic region of the first power semiconductor die. The first contact regions of the first metallic clip are laterally separated from one another by a first gap in the first metallic clip. Additional power semiconductor module embodiments and corresponding methods of production are also described herein.
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97.
公开(公告)号:US20240404774A1
公开(公告)日:2024-12-05
申请号:US18800773
申请日:2024-08-12
Applicant: Infineon Technologies AG
Inventor: Hans Taddiken , Dominik Heiss , Christoph Kadow
IPC: H01H37/02
Abstract: A switch device includes a phase change switch and a memory for storing a target state of the phase change switch. A controller determines a phase state of the phase change switch, and, if the state of the phase change switch does not correspond to the target state, controls a heater of the phase change switch to change the state of the phase changes switch to the target state.
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公开(公告)号:US20240402107A1
公开(公告)日:2024-12-05
申请号:US18674115
申请日:2024-05-24
Applicant: Infineon Technologies AG
Inventor: Ilie-Ionut CRISTEA
Abstract: A thermal conductivity sensor includes a measurement circuit configured to operate in a first circuit configuration during a heating phase of the measurement circuit and in a second circuit configuration during a measurement phase of the measurement circuit. The first circuit configuration is associated with a first power dissipation of the measurement circuit at a supply voltage. The second circuit configuration is associated with a second power dissipation of the measurement circuit at the supply voltage. The first power dissipation is greater than the second power dissipation.
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99.
公开(公告)号:US20240402106A1
公开(公告)日:2024-12-05
申请号:US18672875
申请日:2024-05-23
Applicant: Infineon Technologies AG
Inventor: Christoph STEINER , Gerald HANSEKOWITSCH
Abstract: A sensor device for measuring a gas concentration includes a sensor element a cavity with an opening for receiving a gas, and a resistor element arranged in the cavity, and a power supply unit, which is configured to apply a voltage to the sensor element. The sensor device further includes a control unit, which is configured to set a first voltage of the power supply unit and detect a first output signal of the sensor element at the applied first voltage, and to set a second voltage of the power supply unit and detect a second output signal of the sensor element at the applied second voltage. The second voltage is different from the first voltage. The sensor device further includes an evaluation unit, which is configured to determine the gas concentration based on the first output signal and the second output signal.
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公开(公告)号:US20240388431A1
公开(公告)日:2024-11-21
申请号:US18317399
申请日:2023-05-15
Applicant: Infineon Technologies AG
Inventor: Lukas Holzbaur , Manuela Meier , Alexander Zeh
IPC: H04L9/08
Abstract: The described techniques address issues associated with current post-quantum cryptography (PQC) algorithms by providing a more efficient means of key expansion. Architectures are provided for both an accelerator and an expander, which may be implemented in accordance with any suitable type of cryptographic algorithm that utilizes key expansion, such as PQC algorithms, a key encapsulation mechanism (KEM) algorithm, a Digital Signature Algorithm (DSA), etc. The accelerator architecture enables portions of the expanded key to be generated only when required by a processing block, allowing for the reuse of memory, which allows for a reduction in memory size and thus a smaller footprint (i.e. physical size) compared to conventional architectures. The expander architecture reduces the required interactions and data transfers between the processing block and the key expansion block, thereby reducing the load on the processing block and system components, such as shared buses and bridges.
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