公开(公告)号：US20250062733A1

公开(公告)日：2025-02-20

申请号：US18234651

申请日：2023-08-16

Applicant: Texas Instruments Incorporated

Inventor： Rohit Chatterjee

IPC: H03F3/68 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45 ,  H03F3/72

Abstract: Methods, systems, and apparatus are disclosed for coupling a power amplifier input signal. An example system a first amplifier including a signal input, a feedback input, and a differential output that includes a first output and a second output, a first resistor including a first resistor terminal and a second resistor terminal, wherein the first resistor terminal is coupled to the first output, a second resistor including a third resistor terminal and a fourth resistor terminal, wherein the third resistor terminal is coupled to the second resistor terminal at an output common mode node and the fourth resistor terminal coupled to the second output, and a second amplifier including a first input and a third output, wherein the first input is coupled to the second resistor terminal and third resistor terminal, and the third output is coupled to the feedback input of the first amplifier.

公开(公告)号：US20250060873A1

公开(公告)日：2025-02-20

申请号：US18939018

申请日：2024-11-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kai CHIRCA ,  Matthew David PIERSON

IPC: G06F3/06 ,  G06F9/30 ,  G06F9/38 ,  G06F9/48 ,  G06F9/50 ,  G06F12/06 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0817 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0846 ,  G06F12/0855 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/10 ,  G06F12/1009 ,  G06F13/12 ,  G06F13/16 ,  G06F13/40 ,  H03M13/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/27

Abstract: A device includes a memory bank. The memory bank includes data portions of a first way group. The data portions of the first way group include a data portion of a first way of the first way group and a data portion of a second way of the first way group. The memory bank further includes data portions of a second way group. The device further includes a configuration register and a controller configured to individually allocate, based on one or more settings in the configuration register, the first way and the second way to one of an addressable memory space and a data cache.

公开(公告)号：US12231668B2

公开(公告)日：2025-02-18

申请号：US18228037

申请日：2023-07-31

Applicant: Texas Instruments Incorporated

Inventor： Vivienne Sze ,  Madhukar Budagavi

IPC: H04N19/436 ,  H04N19/13

Abstract: A method of entropy coding in a video encoder is provided that includes assigning a first bin to a first single-probability bin encoder based on a probability state of the first bin, wherein the first single-probability bin encoder performs binary arithmetic coding based on a first fixed probability state, assigning a second bin to a second single-probability bin encoder based on a probability state of the second bin, wherein the second single-probability bin encoder performs binary arithmetic coding based on a second fixed probability state different from the first fixed probability state, and coding the first bin in the first single-probability bin encoder and the second bin in the second single-probability bin encoder in parallel, wherein the first single-probability bin encoder uses a first rLPS table for the first fixed probability state and the second single-probability bin encoder uses a second rLPS table for the second fixed probability state.

公开(公告)号：US12231642B2

公开(公告)日：2025-02-18

申请号：US15431474

申请日：2017-02-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vivienne Sze ,  Madhukar Budagavi

IPC: H04N19/13 ,  H04N19/129 ,  H04N19/18 ,  H04N19/43 ,  H04N19/60 ,  H04N19/61

Abstract: A method and apparatus for encoding bit code utilizing context dependency simplification to reduce dependent scans. The method includes retrieving at least one 2 dimensional array of transform coefficient, transforming the at least one 2 dimensional array of transform coefficient to a 1 dimensional coefficient scanning using a diagonal scan in a fixed direction, utilizing the at least one 1 dimensional array of transform coefficients for context selection based on fewer than 11 neighbors, potentially selected based on scan direction, slice type, coding unit type and binarization, and performing arithmetic coding to generate coded bit utilizing context selection and binarization.

公开(公告)号：US12228432B2

公开(公告)日：2025-02-18

申请号：US18460915

申请日：2023-09-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Lichang Cheng ,  Zichen Qiu ,  Songhua Hu ,  Yang Li

IPC: G01D5/241 ,  G01R27/26

Abstract: An apparatus is provided and includes a rotary encoder that comprises a stator, a rotor, and a controller. The stator has an opening adapted to surround a first portion of a rotatable shaft, a transmit region, and a receive region. The rotor has an opening adapted to surround a second portion of the rotatable shaft, an annular conductive region, and at least one conductor electrically coupled with the annular conductive region. The controller has an input coupled to the receive region and has an output coupled to the transmit region. The controller is configured to transmit a first signal on the output of the controller and to the transmit region of the stator, receive a second signal on the input of the controller and from the receive region of the stator, and determine, based on the second signal, a proximity of the at least one conductor to the receive region.

公开(公告)号：US20250053407A1

公开(公告)日：2025-02-13

申请号：US18448432

申请日：2023-08-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： PETER CHUNG ,  BHARGAVI NISARGA

IPC: G06F8/65 ,  H04L9/08 ,  H04L9/30 ,  H04L9/32

Abstract: A non-transitory machine-readable medium having machine-readable instructions including a firmware generator, the machine-readable instructions for the firmware generator being executable by a processor core to perform operations including signing a firmware image for a hardware security module (HSM) with a private key of a public private key pair to provide a first signature and augmenting the firmware image with a header that includes the first signature to provide an augmented firmware image. The operations further include encrypting the augmented firmware image with a symmetric key to provide an encrypted augmented firmware image. Furthermore, the operations include signing the encrypted augmented firmware image with the private key to provide a second signature and augmenting the encrypted augmented firmware image with the second signature to provide a firmware package for the HSM.

公开(公告)号：US20250052813A1

公开(公告)日：2025-02-13

申请号：US18929471

申请日：2024-10-28

Applicant: Texas Instruments Incorporated

Inventor： Prasanth Viswanathan Pillai ,  Swathi Gangasani ,  Vaskar Sarkar

IPC: G01R31/3177 ,  G01R31/3167 ,  G01R31/3185

Abstract: An example apparatus includes a buffer configured to, when enabled: obtain an input voltage; and provide the input voltage to a first boundary cell; and a second boundary cell configured to, when the apparatus is used in analog mode and a boundary scan occurs disable the buffer.

公开(公告)号：US12224708B2

公开(公告)日：2025-02-11

申请号：US17389935

申请日：2021-07-30

Applicant: Texas Instruments Incorporated

Inventor： Bichoy Bahr ,  Michael Henderson Perrott ,  Baher Haroun ,  Swaminathan Sankaran

IPC: H03B5/32 ,  G06F1/04

Abstract: An oscillator circuit includes a first BAW oscillator, a first coupling stage, a second BAW oscillator, and a second coupling stage. The first BAW oscillator is configured to generate a first output signal at a frequency. The first coupling stage is coupled to the first BAW oscillator, and is configured to amplify the first output signal. The second BAW oscillator is coupled to the first coupling stage, and is configured to generate a second output signal at the frequency. The second output signal differs in phase from the first output signal. The second coupling stage is coupled to the first BAW oscillator and the second BAW oscillator, and is configured to amplify the second output signal and drive the first BAW oscillator.

公开(公告)号：US12223165B2

公开(公告)日：2025-02-11

申请号：US17875440

申请日：2022-07-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Matthew David Pierson ,  Kai Chirca ,  Timothy David Anderson

IPC: G06F12/00 ,  G06F3/06 ,  G06F9/30 ,  G06F9/38 ,  G06F9/48 ,  G06F9/50 ,  G06F12/06 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0817 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0855 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/10 ,  G06F12/1009 ,  G06F13/12 ,  G06F13/16 ,  G06F13/40 ,  H03M13/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/27 ,  G06F12/0846 ,  G06F12/0862

Abstract: A system includes a multi-core shared memory controller (MSMC). The MSMC includes a snoop filter bank, a cache tag bank, and a memory bank. The cache tag bank is connected to both the snoop filter bank and the memory bank. The MSMC further includes a first coherent slave interface connected to a data path that is connected to the snoop filter bank. The MSMC further includes a second coherent slave interface connected to the data path that is connected to the snoop filter bank. The MSMC further includes an external memory master interface connected to the cache tag bank and the memory bank. The system further includes a first processor package connected to the first coherent slave interface and a second processor package connected to the second coherent slave interface. The system further includes an external memory device connected to the external memory master interface.

公开(公告)号：US12223100B2

公开(公告)日：2025-02-11

申请号：US18480815

申请日：2023-10-04

Applicant: Texas Instruments Incorporated

Inventor： Amritpal S. Mundra ,  William C. Wallace

IPC: G06F21/79 ,  G06F12/14 ,  G06F21/60 ,  G06F21/62

Abstract: A real time, on-the-fly data encryption system is operable to encrypt and decrypt data flow between a secure processor and an unsecure external memory system. Multiple memory segments are supported, each with its own separate encryption capability, or no encryption at all. Data integrity is ensured by hardware protection from code attempting to access data across memory segment boundaries. Protection is also provided against dictionary attacks by monitoring multiple access attempts to the same memory location.