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公开(公告)号：US10804937B2
公开(公告)日：2020-10-13
申请号：US16395117
申请日：2019-04-25
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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公开(公告)号：US10804936B2
公开(公告)日：2020-10-13
申请号：US16393788
申请日：2019-04-24
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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公开(公告)号：US10804931B2
公开(公告)日：2020-10-13
申请号：US16526678
申请日：2019-07-30
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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公开(公告)号：US10784894B2
公开(公告)日：2020-09-22
申请号：US16233596
申请日：2018-12-27
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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公开(公告)号：US10756762B2
公开(公告)日：2020-08-25
申请号：US16100268
申请日：2018-08-10
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Nam-Ho Hur , Heung-Mook Kim
Abstract: Disclosed herein are a channel coding/decoding method in which a parity check matrix is transformed and an apparatus using the same. The channel-coding method includes loading a first exponent matrix, transforming the first exponent matrix into a second exponent matrix, creating a parity check matrix corresponding to a required block size using the second exponent matrix, and performing LDPC encoding using the parity check matrix.
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Patent Agency Ranking
公开(公告)号：US10666298B2
公开(公告)日：2020-05-26
申请号：US16405719
申请日：2019-05-07
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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公开(公告)号：US10541709B2
公开(公告)日：2020-01-21
申请号：US14639625
申请日：2015-03-05
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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公开(公告)号：US10484116B2
公开(公告)日：2019-11-19
申请号：US15786401
申请日：2017-10-17
Inventor： Byung-Jun Bae , Hye-Ju Oh , Yong-Seong Cho , Heung-Mook Kim , Joon-Young Jung , Nam-Ho Hur
IPC: H04H20/78 , H04H40/90 , H04N21/236 , H04N21/2362 , H04N21/2381 , H04N21/2665 , H04N7/10 , H04H20/63 , H04H20/95 , H04H40/27 , H04N21/434 , H04N21/61 , H04H60/82
Abstract: Disclosed herein are an apparatus and method for converting a broadcast signal. The apparatus for converting a broadcast signal includes a demultiplexer unit for receiving a terrestrial broadcast signal and generating a terrestrial signaling signal, a signaling conversion unit for converting the terrestrial signaling signal into a cable signaling signal by parsing the terrestrial signaling signal, a cable multiplexer unit for generating a cable broadcast signal by multiplexing the cable signaling signal, and a cable modulation unit for modulating the cable broadcast signal and transmitting the cable broadcast signal over a cable network.
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公开(公告)号：US10447305B2
公开(公告)日：2019-10-15
申请号：US14664718
申请日：2015-03-20
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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100.发明授权公开(公告)号：US10419159B2
公开(公告)日：2019-09-17
申请号：US15426913
申请日：2017-02-07
Inventor： Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
IPC: H04L1/00 , H03M13/11 , H03M13/03 , H03M13/31 , H03M13/00 , H03M13/25 , H03M13/27 , H03M13/29 , H04L27/26
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).
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