公开(公告)号：US20120071472A1

公开(公告)日：2012-03-22

申请号：US13171102

申请日：2011-06-28

Applicant: Kai Liu ,  Christopher B. Cooper ,  Haihong Huang ,  Chun Li ,  Binna Liu ,  Yang Liu ,  Zhenkun Ma ,  Jingbin Wang ,  Dali Yin ,  Dongfeng Zhang ,  Gang Zhang ,  Hao Zhang

Inventor： Kai Liu ,  Christopher B. Cooper ,  Haihong Huang ,  Chun Li ,  Binna Liu ,  Yang Liu ,  Zhenkun Ma ,  Jingbin Wang ,  Dali Yin ,  Dongfeng Zhang ,  Gang Zhang ,  Hao Zhang

IPC: A61K31/498 ,  A61K31/506 ,  C07D401/12 ,  C07D401/14 ,  A61P31/06 ,  A61K31/5377 ,  C07D405/14 ,  C07D409/14 ,  A61P31/04 ,  C07D403/12 ,  C07D413/14

CPC classification number: C07D409/14 ,  A61K31/498 ,  A61K31/506 ,  A61K31/5377 ,  A61K45/06 ,  C07D401/12 ,  C07D401/14 ,  C07D403/12 ,  C07D405/12 ,  C07D407/14 ,  C07D409/12

Abstract: The present invention relates to riminophenazines having heteroaromatic substitutions, including those with 2-heteroaryl-amino substituents, to their preparation, and to their use as drugs for treating Mycobacterium tuberculosis and other microbial infections, either alone or in combination with other anti-infective treatments.

Abstract translation: 本发明涉及具有杂芳香取代基，包括具有2-杂芳基 - 氨基取代基的那些，其制备方法及其用作治疗结核分枝杆菌和其它微生物感染的药物，其单独使用或与其它抗感染治疗组合 。

公开(公告)号：US20120032244A1

公开(公告)日：2012-02-09

申请号：US13273546

申请日：2011-10-14

Applicant: François Hébert ,  Kai Liu

Inventor： François Hébert ,  Kai Liu

IPC: H01L29/94

CPC classification number: H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/84

Abstract: A top-side cooled compact semiconductor package with integrated bypass capacitor is disclosed. The top-side cooled compact semiconductor package includes a circuit substrate with terminal leads, numerous semiconductor dies bonded atop the circuit substrate, numerous elevation-adaptive interconnection plates for bonding and interconnecting top contact areas of the semiconductor dies with the circuit substrate, a first member of the elevation-adaptive interconnection plates has a first flat-top area and a second member of the elevation-adaptive interconnection plates has a second flat-top area in level with the first flat-top area, a bypass capacitor, having two capacitor terminals located at its ends, stacked atop the two interconnection plate members while being bonded thereto via the first flat-top area and the second flat-top area for a reduced interconnection parasitic impedance.

Abstract translation: 公开了具有集成旁路电容器的顶侧冷却紧凑型半导体封装。 顶侧冷却的紧凑型半导体封装包括具有端子引线的电路基板，接合在电路基板顶上的多个半导体管芯，用于将半导体管芯的顶部接触区域与电路基板接合和互连的许多仰角自适应互连板，第一构件 所述高度自适应互连板具有第一平顶区域，并且所述仰角自适应互连板的第二构件具有与所述第一平顶区域平齐的第二平顶区域，具有两个电容器端子的旁路电容器 位于其端部，并且通过第一平顶部区域和第二平顶部区域结合到两个互连板构件的顶部，以减少互连寄生阻抗。

公开(公告)号：US08111113B2

公开(公告)日：2012-02-07

申请号：US12705810

申请日：2010-02-15

Applicant: Kai Liu ,  Robert Charles Frye

Inventor： Kai Liu ,  Robert Charles Frye

IPC: H03H7/00 ,  H01G4/06

CPC classification number: H03H7/09 ,  H01F17/0006 ,  H01F2017/0046 ,  H01F2017/0073 ,  H03H7/1708 ,  H03H7/1775 ,  Y10T29/4902

Abstract: A semiconductor device has a first coil structure formed over the substrate. A second coil structure is formed over the substrate adjacent to the first coil structure. A third coil structure is formed over the substrate adjacent to the second coil structure. The first and second coil structures are coupled by mutual inductance, and the second and third coil structures are coupled by mutual inductance. The first, second, and third coil structures each have a height greater than a skin current depth of the coil structure defined as a depth which current reduces to 1/(complex permittivity) of a surface current value. A thin film capacitor is formed within the semiconductor device by a first metal plate, dielectric layer over the first metal plate, and second and third electrically isolated metal plates opposite the first metal plate. The terminals are located on the same side of the capacitor.

Abstract translation: 半导体器件具有形成在衬底上的第一线圈结构。 在与第一线圈结构相邻的衬底上形成第二线圈结构。 在与第二线圈结构相邻的衬底上形成第三线圈结构。 第一和第二线圈结构通过互感耦合，并且第二和第三线圈结构通过互感耦合。 第一，第二和第三线圈结构各自具有高于线圈结构的皮肤电流深度的高度，其被定义为电流减小到表面电流值的1 /（复数介电常数）的深度。 通过第一金属板，第一金属板上的电介质层和与第一金属板相对的第二和第三电隔离金属板，在半导体器件内形成薄膜电容器。 端子位于电容器的同一侧。

公开(公告)号：US20110309892A1

公开(公告)日：2011-12-22

申请号：US13219374

申请日：2011-08-26

Applicant: Robert C. Frye ,  Kai Liu

Inventor： Robert C. Frye ,  Kai Liu

IPC: H03H7/42 ,  H01L21/02

CPC classification number: H01L28/10 ,  H01L23/64 ,  H01L23/66 ,  H01L27/016 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/09701 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03H7/42 ,  H03H2001/0064 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor die has an RF coupler and balun integrated on a common substrate. The RF coupler includes first and second conductive traces formed in close proximity. The RF coupler further includes a resistor. The balun includes a primary coil and two secondary coils. A first capacitor is coupled between first and second terminals of the semiconductor die. A second capacitor is coupled between a third terminal of the semiconductor die and a ground terminal. A third capacitor is coupled between a fourth terminal of the semiconductor die and the ground terminal. A fourth capacitor is coupled between the high side and low side of the primary coil. The integration of the RF coupler and balun on the common substrate offers flexible coupling strength and signal directivity, and further improves electrical performance due to short lead lengths, reduces form factor, and increases manufacturing yield.

Abstract translation: 半导体管芯具有集成在公共衬底上的RF耦合器和平衡 - 不平衡变换器。 RF耦合器包括紧邻形成的第一和第二导电迹线。 RF耦合器还包括电阻器。 平衡 - 不平衡转换器包括一个初级线圈和两个次级线圈。 第一电容器耦合在半导体管芯的第一和第二端子之间。 第二电容器耦合在半导体管芯的第三端子和接地端子之间。 第三电容器耦合在半导体管芯的第四端子和接地端子之间。 第四电容器耦合在初级线圈的高侧和低侧之间。 RF耦合器和平衡 - 不平衡转换器在公共基板上的集成提供了灵活的耦合强度和信号方向性，并且由于短的引线长度，减小了外形尺寸，并且提高了制造成品率，从而进一步提高了电气性能。

公开(公告)号：US08062932B2

公开(公告)日：2011-11-22

申请号：US12330381

申请日：2008-12-08

Applicant: François Hébert ,  Kai Liu

Inventor： François Hébert ,  Kai Liu

IPC: H01L21/00 ,  H01L21/70

CPC classification number: H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/84

Abstract: A top-side cooled compact semiconductor package with integrated bypass capacitor is disclosed. The top-side cooled compact semiconductor package includes a circuit substrate with terminal leads, numerous semiconductor dies bonded atop the circuit substrate, numerous elevation-adaptive interconnection plates for bonding and interconnecting top contact areas of the semiconductor dies with the circuit substrate, a first member of the elevation-adaptive interconnection plates has a first flat-top area and a second member of the elevation-adaptive interconnection plates has a second flat-top area in level with the first flat-top area, a bypass capacitor, having two capacitor terminals located at its ends, stacked atop the two interconnection plate members while being bonded thereto via the first flat-top area and the second flat-top area for a reduced interconnection parasitic impedance.

Abstract translation: 公开了具有集成旁路电容器的顶侧冷却紧凑型半导体封装。 顶侧冷却的紧凑型半导体封装包括具有端子引线的电路基板，接合在电路基板顶上的多个半导体管芯，用于将半导体管芯的顶部接触区域与电路基板接合和互连的许多仰角自适应互连板，第一构件 所述高度自适应互连板具有第一平顶区域，并且所述仰角自适应互连板的第二构件具有与所述第一平顶区域平齐的第二平顶区域，具有两个电容器端子的旁路电容器 位于其端部，并且通过第一平顶部区域和第二平顶部区域结合到两个互连板构件的顶部，以减少互连寄生阻抗。

公开(公告)号：US20110261747A1

公开(公告)日：2011-10-27

申请号：US13075961

申请日：2011-03-30

Applicant: Peter S. Wang ,  Janet A. Stern-Berkowitz ,  Nobuyuki Tamaki ,  Stephen E. Terry ,  Mihaela C. Beluri ,  Kai Liu

Inventor： Peter S. Wang ,  Janet A. Stern-Berkowitz ,  Nobuyuki Tamaki ,  Stephen E. Terry ,  Mihaela C. Beluri ,  Kai Liu

IPC: H04B7/14

CPC classification number: H04W40/22 ,  H04B7/155 ,  H04W16/26 ,  H04W28/0278 ,  H04W36/08 ,  H04W72/0446 ,  H04W72/1221 ,  H04W84/047

Abstract: A method and apparatus for supporting communication via a relay node are disclosed. A relay node may receive wireless transmit/receive unit (WTRU) buffer status reports (BSRs) from a plurality of WTRUs that are served by the relay node. The WTRU BSRs indicate uplink buffer status at the WTRUs. The relay node then may forward the WTRU BSRs to a donor evolved Node B (DeNB). The relay node may send a relay node BSR to the DeNB. The relay node BSR indicates a relay node uplink buffer status and/or a relay node downlink buffer status at the relay node. The relay node may send a radio resource control (RRC) message to the DeNB for requesting radio resource reconfiguration.

Abstract translation: 公开了一种用于支持通过中继节点进行通信的方法和装置。 中继节点可以从由中继节点服务的多个WTRU接收无线发射/接收单元（WTRU）缓冲器状态报告（BSR）。 WTRU BSR指示WTRU处的上行链路缓冲器状态。 中继节点然后可以将WTRU BSR转发到捐赠演进节点B（DeNB）。 中继节点可以向DeNB发送中继节点BSR。 中继节点BSR在中继节点处指示中继节点上行缓冲器状态和/或中继节点下行缓冲器状态。 中继节点可以向DeNB发送无线电资源控制（RRC）消息，以请求无线资源重配置。

公开(公告)号：US08012585B2

公开(公告)日：2011-09-06

申请号：US12321557

申请日：2009-01-22

Applicant: Kai Liu ,  Kai-Li Jiang ,  Liang Liu ,  Shou-Shan Fan

Inventor： Kai Liu ,  Kai-Li Jiang ,  Liang Liu ,  Shou-Shan Fan

IPC: B32B9/00

CPC classification number: H01B1/02 ,  H01B1/04 ,  Y10S977/742 ,  Y10T428/265 ,  Y10T428/2918 ,  Y10T428/30

Abstract: A carbon nanotube composite film includes a carbon nanotube film and at least one conductive coating. The carbon nanotube film includes an amount of carbon nanotubes. The carbon nanotubes are parallel to a surface of the carbon nanotube film. The least one conductive coating is disposed about the carbon nanotube.

Abstract translation: 碳纳米管复合膜包括碳纳米管膜和至少一个导电涂层。 碳纳米管膜包括一定量的碳纳米管。 碳纳米管平行于碳纳米管膜的表面。 至少一个导电涂层围绕碳纳米管设置。

公开(公告)号：US07951651B2

公开(公告)日：2011-05-31

申请号：US12474089

申请日：2009-05-28

Applicant: Kai Liu ,  Xiaotian Zhang ,  Ming Sun ,  Leeshawn Luo

Inventor： Kai Liu ,  Xiaotian Zhang ,  Ming Sun ,  Leeshawn Luo

IPC: H01L21/00

CPC classification number: H01L24/48 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/45 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48799 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: A DFN semiconductor package includes a leadframe having a die bonding pad formed integrally with a drain lead, a gate lead and a source lead, a die coupled to the die bonding pad, a die source bonding area coupled to the source lead and a die gate bonding area coupled to the gate lead, and an encapsulant at least partially covering the die, drain lead, gate lead and source lead.

Abstract translation: DFN半导体封装包括引线框架，其具有与漏极引线，栅极引线和源极引线一体形成的管芯焊接焊盘，耦合到管芯焊接焊盘的管芯，耦合到源极引线的管芯源极接合区域和管芯栅极 键合区域，以及密封剂，其至少部分地覆盖晶片，漏极引线，栅极引线和源极引线。

公开(公告)号：US07941203B2

公开(公告)日：2011-05-10

申请号：US11903324

申请日：2007-09-21

Applicant: Quanlu Zheng ,  Tie Gao ,  Jiadi Li ,  Kai Liu ,  Qingze Yu ,  Baowei Xu ,  Haitao Mu ,  Qizhi Zhang ,  Xinghua Zhao

Inventor： Quanlu Zheng ,  Tie Gao ,  Jiadi Li ,  Kai Liu ,  Qingze Yu ,  Baowei Xu ,  Haitao Mu ,  Qizhi Zhang ,  Xinghua Zhao

IPC: A61B5/05

CPC classification number: A61B6/5276 ,  A61B6/032 ,  A61B6/0457 ,  A61B6/4417

Abstract: A multimodality imaging system, comprising: a first imaging system for forming a first image; a second imaging system for forming a second image; and a rotating device on which the first imaging system and the second imaging system are fixed so that the first imaging system and the second imaging system are selectively rotated to a scanning position.

Abstract translation: 一种多模态成像系统，包括：用于形成第一图像的第一成像系统; 用于形成第二图像的第二成像系统; 以及旋转装置，其上固定有第一成像系统和第二成像系统，使得第一成像系统和第二成像系统选择性地旋转到扫描位置。

公开(公告)号：US07906375B2

公开(公告)日：2011-03-15

申请号：US12832913

申请日：2010-07-08

Applicant: Kai Liu ,  Ming Sun

Inventor： Kai Liu ,  Ming Sun

IPC: H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/495 ,  H01L29/00

CPC classification number: H01L24/49 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/37099

Abstract: A semiconductor package is disclosed for packaging two adjacent semiconductor dies atop a circuit substrate. The dies are separated from each other along their longitudinal edges with an inter-die distance. An elevation-adaptive electrical connection connects a top metalized contact of die two to the bottom surface of die one while accommodating for elevation difference between the surfaces. The elevation-adaptive electrical connection includes: a) An L-shaped circuit route that is part of the circuit substrate, extending transversely from a die one longitudinal edge and placing an intermediate contact area next to a die two transverse edge. b) An interconnection plate connecting the top metalized contact area of die two with the intermediate contact area while being formed to accommodate for elevation difference between the contact areas. Consequently, the semiconductor package reduces the inter-die distance from an otherwise direct transverse circuit routing between the longitudinal edges of the dies.

Abstract translation: 公开了一种半导体封装，用于在电路基板顶部封装两个相邻的半导体管芯。 模具沿其纵向边缘彼此分开，具有模间距离。 高度自适应电连接将模具2的顶部金属化接触件连接到模具的底表面，同时容纳表面之间的高度差。 升降自适应电连接包括：a）L形电路，其是电路基板的一部分，从模具的一个纵向边缘横向延伸，并将中间接触区域放置在模具两个横向边缘旁边。 b）互连板，其在形成时将模具2的顶部金属化接触区域与中间接触区域连接，以适应接触区域之间的高度差。 因此，半导体封装减少了在芯片的纵向边缘之间的另外直接的横向电路布线的晶片间距离。