公开(公告)号：US20150348968A1

公开(公告)日：2015-12-03

申请号：US14713802

申请日：2015-05-15

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Greg Charles Baldwin

IPC: H01L27/092 ,  H01L29/08 ,  H01L29/78 ,  H01L29/10 ,  H01L29/417 ,  H01L21/265 ,  H01L21/311 ,  H01L21/3213 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/15

CPC classification number: H01L27/092 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/823475 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/088 ,  H01L27/15 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/1083 ,  H01L29/122 ,  H01L29/41758 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66575 ,  H01L29/6659 ,  H01L29/7391 ,  H01L29/7613 ,  H01L29/775 ,  H01L29/7833 ,  H01L29/7836

Abstract: Methods and apparatus for artificial exciton devices. An artificial exciton device includes a semiconductor substrate; at least one well region doped to a first conductivity type in a portion of the semiconductor substrate; a channel region in a central portion of the well region; a cathode region in the well region doped to a second conductivity type; an anode region in the well region doped to the first conductivity type; a first lightly doped drain region disposed between the cathode region and the channel region doped to the first conductivity type; a second lightly doped drain region disposed between the anode region and the channel region doped to the second conductivity type; and a gate structure overlying the channel region, the gate structure comprising a gate dielectric layer lying over the channel region and a gate conductor material overlying the gate dielectric. Methods are disclosed.

Abstract translation: 人造激子装置的方法和装置。 人造激子装置包括半导体衬底; 在所述半导体衬底的一部分中掺杂到第一导电类型的至少一个阱区; 在所述阱区域的中心部分中的沟道区域; 掺杂到第二导电类型的阱区中的阴极区; 掺杂到第一导电类型的阱区中的阳极区; 布置在阴极区和掺杂到第一导电类型的沟道区之间的第一轻掺杂漏区; 设置在所述阳极区域和掺杂到所述第二导电类型的沟道区域之间的第二轻掺杂漏极区域; 以及覆盖沟道区的栅极结构，栅极结构包括位于沟道区上方的栅极电介质层和覆盖栅极电介质的栅极导体材料。 公开了方法。

公开(公告)号：US08716821B2

公开(公告)日：2014-05-06

申请号：US13767978

申请日：2013-02-15

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Dimitar Trifonov Trifonov

IPC: H01L27/14

CPC classification number: H01L31/075 ,  H01L31/0224 ,  H01L31/022408 ,  H01L31/103 ,  H01L31/1804 ,  Y02E10/547

Abstract: A semiconductor device contains a photodiode which includes a buried collection region formed by a bandgap well to vertically confine photo-generated minority carriers. the bandgap well has the same conductivity as the semiconductor material immediately above and below the bandgap well. A net average doping density in the bandgap well is at least a factor of ten less than net average doping densities immediately above and below the bandgap well. A node of the photodiode, either the anode or the cathode, is connected to the buried collection region to collect the minority carriers, the polarity of the node matches the polarity of the minority carriers. The photodiode node connected to the buried collection region occupies less lateral area than the lateral area of the buried collection region.

Abstract translation: 半导体器件包括光电二极管，其包括由带隙阱形成的掩埋采集区域，以垂直地限制光产生的少数载流子。 带隙阱具有与带隙阱正上方和下方的半导体材料相同的导电性。 带隙阱中的净平均掺杂密度至少比带隙阱上方和下方的净平均掺杂密度小十倍。 光电二极管（阳极或阴极）的一个节点连接到埋藏采集区域以收集少数载流子，节点的极性与少数载流子的极性匹配。 连接到埋藏采集区的光电二极管节点占据比埋藏收集区域的侧向区域更小的横向面积。

公开(公告)号：US12218235B2

公开(公告)日：2025-02-04

申请号：US17487149

申请日：2021-09-28

Applicant: Texas Instruments Incorporated

Inventor： Christopher Boguslaw Kocon ,  Henry Litzmann Edwards ,  Curry Bachman Taylor

IPC: H01L29/78 ,  H01L29/40

Abstract: A microelectronic device includes a hybrid component. The microelectronic device has a substrate including silicon semiconductor material. The hybrid component includes a silicon portion in the silicon, and a wide bandgap (WBG) structure on the silicon. The WBG structure includes a WBG semiconductor material having a bandgap energy greater than a bandgap energy of the silicon. The hybrid component has a first current terminal on the silicon, and a second current terminal on the WBG semiconductor structure. The microelectronic device may be formed by forming the silicon portion of the hybrid component in the silicon, and subsequently forming the WBG structure on the silicon.

公开(公告)号：US12205944B2

公开(公告)日：2025-01-21

申请号：US17887758

申请日：2022-08-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Akram A. Salman ,  Binghua Hu

IPC: H01L27/02 ,  H01L21/265 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8222 ,  H01L27/06 ,  H01L29/06 ,  H01L29/10

Abstract: An ESD cell includes an n+ buried layer (NBL) within a p-epi layer on a substrate. An outer deep trench isolation ring (outer DT ring) includes dielectric sidewalls having a deep n-type diffusion (DEEPN diffusion) ring (DEEPN ring) contacting the dielectric sidewall extending downward to the NBL. The DEEPN ring defines an enclosed p-epi region. A plurality of inner DT structures are within the enclosed p-epi region having dielectric sidewalls and DEEPN diffusions contacting the dielectric sidewalls extending downward from the topside surface to the NBL. The inner DT structures have a sufficiently small spacing with one another so that adjacent DEEPN diffusion regions overlap to form continuous wall of n-type material extending from a first side to a second side of the outer DT ring dividing the enclosed p-epi region into a first and second p-epi region. The first and second p-epi region are connected by the NBL.

公开(公告)号：US20240363720A1

公开(公告)日：2024-10-31

申请号：US18459065

申请日：2023-08-31

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards

IPC: H01L29/49 ,  H01L21/3215 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/4983 ,  H01L21/32155 ,  H01L29/0653 ,  H01L29/401 ,  H01L29/402 ,  H01L29/66681 ,  H01L29/7816

Abstract: Disclosed examples include microelectronic devices, e.g. integrated circuits, that include a source region and a drain region extending into a semiconductor substrate, the semiconductor substrate having a second conductivity type, the source region and drain region having an opposite first conductivity type. A channel region having the second conductivity type extends between the source region and the drain region. A gate electrode over the channel region has a first portion and a second portion. The first portion has the second conductivity type and a first dopant concentration. The second portion extends from the first portion toward the source region and has the second conductivity type and a second higher dopant concentration.

公开(公告)号：US12087870B2

公开(公告)日：2024-09-10

申请号：US17377052

申请日：2021-07-15

Applicant: Texas Instruments Incorporated

Inventor： Debarshi Basu ,  Henry Litzmann Edwards ,  Ricky A. Jackson ,  Marco A. Gardner

IPC: H01L31/0232 ,  G01J1/02 ,  G01J1/04 ,  G01J1/42 ,  H01L25/16 ,  H01L31/103

CPC classification number: H01L31/02327 ,  G01J1/02 ,  G01J1/0209 ,  G01J1/0411 ,  G01J1/42 ,  H01L25/167 ,  H01L31/103

Abstract: An integrated circuit that includes a substrate, a photodiode, and a Fresnel structure. The photodiode is formed on the substrate, and it has a p-n junction. The Fresnel structure is formed above the photodiode, and it defines a focal zone that is positioned within a proximity of the p-n junction. In one aspect, the Fresnel structure may include a trench pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In another aspect, the Fresnel structure may include a wiring pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In yet another aspect, the Fresnel structure may include a transparent dielectric pattern that functions as a refractive means for redirecting and concentrating incident photons to the focal zone.

公开(公告)号：US11925119B2

公开(公告)日：2024-03-05

申请号：US17550067

申请日：2021-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Barry Jon Male ,  Henry Litzmann Edwards

IPC: H01L35/30 ,  H03K17/567 ,  H03K17/605 ,  H03K17/689 ,  H10N10/13 ,  H10N10/17 ,  H10N19/00

CPC classification number: H10N10/13 ,  H03K17/567 ,  H03K17/605 ,  H03K17/689 ,  H10N10/17 ,  H10N19/00

Abstract: A system on an integrated circuit (IC) chip includes an input terminal and a return terminal, a heater, a thermopile, and a switch device. The heater is coupled between the input terminal and the return terminal. The thermopile is spaced apart from the heater by a galvanic isolation region. The switch device includes a control input coupled to an output of the thermopile. The switch device is coupled to at least one output terminal of the IC chip.

公开(公告)号：US20230157175A1

公开(公告)日：2023-05-18

申请号：US17528990

申请日：2021-11-17

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Andres Arturo Blanco ,  Orlando Lazaro

IPC: H01L27/16

CPC classification number: H01L27/16 ,  H01L35/32

Abstract: Integrated circuit apparatus, and their manufacturing methods, including an integrated power transistor and thermocouple. The power transistor is constructed in a plurality of layers formed over a semiconductor substrate. The thermocouple includes a p-thermopile and an n-thermopile that are each electrically isolated from the power transistor and the semiconductor substrate while being sensitive to temperature differences within the IC resulting from operation of the power transistor. The p-thermopile includes a p-type thermoelectric body formed in a p-type one or more of the plurality of layers. The n-thermopile includes n-type thermoelectric body formed in an n-type one or more of the plurality of layers.

公开(公告)号：US11574903B2

公开(公告)日：2023-02-07

申请号：US15665575

申请日：2017-08-01

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Akram A. Salman ,  Md Iqbal Mahmud

IPC: H01L27/02 ,  H01L29/747 ,  H01L29/66 ,  H01L29/45 ,  H01L29/74 ,  H01L29/06

Abstract: A first silicon controlled rectifier has a breakdown voltage in a first direction and a breakdown voltage in a second direction. A second silicon controlled rectifier has a breakdown voltage with a higher magnitude than the first silicon controlled rectifier in the first direction, and a breakdown voltage with a lower magnitude than the first silicon controlled rectifier in the second direction. A bidirectional electrostatic discharge (ESD) structure utilizes both the first silicon controlled rectifier and the second silicon controlled rectifier to provide bidirectional protection.

公开(公告)号：US11563130B2

公开(公告)日：2023-01-24

申请号：US16867309

申请日：2020-05-05

Applicant: Texas Instruments Incorporated

Inventor： James Becker ,  Henry Litzmann Edwards

IPC: H01L31/0232 ,  H01L31/02 ,  H01L31/103

Abstract: An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the semiconductor substrate and a metal layer. The photodiode includes a first semiconductor layer having the first conductive type and a second semiconductor layer, formed on the first semiconductor layer, including a plurality of cathodes having a second conductive type. The first semiconductor layer is configured to collect photocurrent upon reception of incident light. The cathodes are configured to be electrically connected to the first semiconductor layer and the second semiconductor layer is configured to, based on the collected photocurrent, to track the incident light. The metal layer further includes a pinhole configured to collimate the incident light, and the plurality of cathodes form a rotational symmetry of order n with respect to an axis of the pinhole.