Photonic chip with integrated collimation structure

    公开(公告)号:US10690848B2

    公开(公告)日:2020-06-23

    申请号:US16260655

    申请日:2019-01-29

    Abstract: The present disclosure relates to shaping of optic beams at the inputs/outputs of a photonic chip, the spectral widening of the light coupled to this chip, and a method for manufacturing the chip. The photonic chip includes a light guiding layer supported by a substrate. The chip includes at least one light guiding structure made of silicon coupled on one side to a vertical coupler and on another side to an optical component integrated in the light guiding layer. The photonic chip has a front face on the vertical coupler side and a rear face on the substrate side. A collimation structure of digital lens type is integrated at the level of the rear face to collimate the mode size of the light beam incident on the lens and coming from the vertical coupler.

    PVT detection circuit
    122.
    发明授权

    公开(公告)号:US10685700B2

    公开(公告)日:2020-06-16

    申请号:US16219552

    申请日:2018-12-13

    Abstract: A PVT detection circuit including: first and second transistors of a first conduction type each having its control node coupled to a control line, the first and second transistors being configured such that the variations in their threshold voltages as a function of temperature and/or process are different from each other; and an amplifier coupled to a second main conducting node of each of the first and second transistors and configured to amplify a difference in the currents conducted by the first and second transistors in order to generate an output signal.

    Method for manufacturing a photosensor comprising a stack of layers placed on top of each other

    公开(公告)号:US10665632B2

    公开(公告)日:2020-05-26

    申请号:US16316010

    申请日:2017-07-06

    Abstract: The invention relates to a method for manufacturing a photodetector able to operate for the photodetection of infrared electromagnetic waves, comprising a stack of thin layers placed on top of one another. The method includes obtaining a first assembly (E1) of stacked layers, forming a detection assembly, comprising a first substrate layer, a photoabsorbent layer, a barrier layer and at least one contact layer, and a second assembly (E2) of stacked layers forming a reading circuit, comprising at least one second substrate layer and a multiplexing layer. The first and second assemblies are glued between the contact layer of the first assembly and the multiplexing layer of the second assembly. Etching through the second assembly makes it possible to obtain a plurality of interconnect vias, then p or n doping of zones of the first contact layer of the first assembly through the interconnect vias.

    Power Converter
    127.
    发明申请
    Power Converter 审中-公开

    公开(公告)号:US20200099297A1

    公开(公告)日:2020-03-26

    申请号:US16576182

    申请日:2019-09-19

    Abstract: A power converter including: a first branch and a second branch of at least two series-connected switches each, coupled in parallel between a first terminal and a second terminal and having the junction points of their switches coupled to two terminals of application of a first voltage; a third branch and a fourth branch of at least two series-connected switches each, coupled in parallel between a third terminal and a fourth terminal, and having the junction points of their switches coupled to two terminals for supplying a second voltage; and at least one piezoelectric element coupling the first terminal to the third terminal.

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