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    Data compression using content addressable memory
    11.
    发明授权
    Data compression using content addressable memory 失效
    使用内容可寻址内存的数据压缩

    公开(公告)号：US5339076A

    公开(公告)日：1994-08-16

    申请号：US876771

    申请日：1992-04-27

    Applicant: Ching-Lin Jiang

    Inventor： Ching-Lin Jiang

    IPC: G06F5/00 ,  G06F17/21 ,  G06T9/00 ,  H03M7/30 ,  H03M7/46

    CPC classification number: H03M7/3086 ,  G06T9/005

    Abstract: A data compression/decompression processor implements a modified Ziv-Lempel ("LZ") coding technique. The processor includes three modules, an interface, a coder-decoder ("CODEC"), and a MODEL. The CODEC and the MODEL modules together form compression engine, in which the CODEC provides variable length coding and data packing, and the MODEL implements the LZ processing. The MODEL uses content addressable memory ("CAM") in encoding mode for text storage and character matching, and uses CAM in decoding mode as an on-chip RAM to obtain high speed access.

    Abstract translation: 数据压缩/解压缩处理器实现修改的Ziv-Lempel（“LZ”）编码技术。 处理器包括三个模块，一个接口，一个编码器解码器（“CODEC”）和一个MODEL。 CODEC和MODEL模块一起形成压缩引擎，其中CODEC提供可变长度编码和数据打包，MODEL实现LZ处理。 MODEL在编码模式下使用内容可寻址存储器（“CAM”）进行文本存储和字符匹配，并将解码模式下的CAM用作片上RAM以获得高速访问。

    Delay circuit for a monolithic integrated circuit and method for adjusting delay of same
    12.
    发明授权
    Delay circuit for a monolithic integrated circuit and method for adjusting delay of same 失效
    单片集成电路的延迟电路及其延时调整方法

    公开(公告)号：US4894791A

    公开(公告)日：1990-01-16

    申请号：US828230

    申请日：1986-02-10

    Applicant: Ching-Lin Jiang ,  William J. Podkowa

    Inventor： Ching-Lin Jiang ,  William J. Podkowa

    IPC: H03K5/04 ,  H03K19/003

    CPC classification number: H03K5/04 ,  H03K19/00323

    Abstract: A delay circuit that can be implemented in a monolithic integrated circuit includes a plurality of capacitor/laser-fusible link series pairs. Delay of a binary output signal of the circuit with respect to an input transition is directly proportional to the amount of capacitance connected into the circuit. Because the laser-fusible links can selectively be opened with a laser, the amount of capacitance connected into the circuit can incrementally be reduced; thus, the delay of the circuit is reducibly adjustable to a desired value. By including a plurality of conductive element/laser-fusible link series pairs in the delay circuit, the delay of the circuit is also increasingly adjustable. A method for economically adjusting the delay of each of many like delay circuits embodied in a semiconductor wafer includes measuring a sample of the delays of the delay circuits, calculating an average delay, determining the difference between a desired delay and the average delay to determine an incremental amount of delay to eliminate or to add, determining from predetermined data which fusible links should be opened, and using a laser beam to open the appropriate links.

    Abstract translation: 可以在单片集成电路中实现的延迟电路包括多个电容器/激光可熔链节串联对。 相对于输入跃迁的电路的二进制输出信号的延迟与连接到电路中的电容量成正比。 因为激光熔丝可以选择性地用激光打开，连接到电路中的电容量可以逐渐减小; 因此，电路的延迟可以可调节到期望的值。 通过在延迟电路中包括多个导电元件/激光可熔链节串联对，电路的延迟也越来越可调。 用于经济地调节在半导体晶片中实现的许多类似延迟电路中的每一个的延迟的方法包括测量延迟电路的延迟的样本，计算平均延迟，确定期望延迟和平均延迟之间的差以确定 消除或添加的增量的延迟量，从预定数据确定哪个可熔断链接应该被打开，以及使用激光束打开适当的链接。

    Clocking system for a self-refreshed dynamic memory
    14.
    发明授权
    Clocking system for a self-refreshed dynamic memory 失效
    用于自动刷新动态存储器的时钟系统

    公开(公告)号：US4360903A

    公开(公告)日：1982-11-23

    申请号：US265994

    申请日：1980-09-10

    Applicant: Robert S. Plachno ,  Ching-Lin Jiang

    Inventor： Robert S. Plachno ,  Ching-Lin Jiang

    IPC: G11C11/406 ,  G11C11/4063 ,  G11C7/00

    CPC classification number: G11C11/406 ,  G11C11/4063

    Abstract: A clocking system for a self-refreshed dynamic memory (10) for reading data stored in a memory cell (30) and including clocking circuitry (68) includes detecting changes in an address signal (60). The method further includes generating a memory refresh signal (64, 66) in response to detecting changes in the address signal (60). The memory refresh signal (66) is applied to the semiconductor memory circuit (30) for refreshing data stored in the memory cells of the semiconductor memory circuit (30). After the application of the memory refresh signal (66) to the semiconductor memory circuit (30) the address signal (16) is applied to the semiconductor memory circuit (30) for accessing the addressed memory cell to thereby read the data stored therein. The clocking circuitry (68) is reset and precharged during the application of the refresh signal (66) to the semiconductor memory circuit (30).

    Abstract translation: PCT No.PCT / US80 / 01162 Sec。 371日期1980年9月10日 102（e）1980年9月10日PCT PCT日期为1980年9月10日PCT公布。 第WO82 / 00915号公报 日期：1982年3月18日。一种用于读取存储在存储单元（30）中并包括时钟电路（68）的数据的自动刷新动态存储器（10）的计时系统，包括检测地址信号（60）中的变化。 该方法还包括响应于检测到地址信号（60）中的变化而产生存储器刷新信号（64,66）。 存储器刷新信号（66）被施加到半导体存储器电路（30），用于刷新存储在半导体存储器电路（30）的存储单元中的数据。 在向半导体存储器电路（30）施加存储器刷新信号（66）之后，将地址信号（16）施加到半导体存储器电路（30），以访问所寻址的存储器单元，从而读取存储在其中的数据。 在刷新信号（66）施加到半导体存储器电路（30）期间，时钟电路（68）被复位并被预充电。

    Charge-coupled analog-to-digital converter
    15.
    发明授权
    Charge-coupled analog-to-digital converter 失效
    电荷耦合模数转换器

    公开(公告)号：US4306221A

    公开(公告)日：1981-12-15

    申请号：US25138

    申请日：1979-03-29

    Applicant: Ching-Lin Jiang ,  Chi-Shin Wang

    Inventor： Ching-Lin Jiang ,  Chi-Shin Wang

    IPC: H03M1/00 ,  H03K13/03

    CPC classification number: H03M1/14

    Abstract: Analog-to-digital conversion through successive approximation is implemented by means of a charge coupled device. During the conversion process two charges are compared, each comparison yielding one bit of a multi-bit number. By increasing the lesser of the compared charges after each comparison, the need to subtract charge as part of the successive approximation process is eliminated.

    Abstract translation: 通过逐次逼近的模数转换通过电荷耦合器件实现。 在转换过程中，比较两个电荷，每个比较产生一个多位数的一位。 通过在每次比较之后增加较小的比较电荷，消除了作为逐次逼近处理的一部分的电荷减去的需要。

    Charge-coupled analog-to-digital converter
    16.
    发明授权
    Charge-coupled analog-to-digital converter 失效
    电荷耦合模数转换器

    公开(公告)号：US4171521A

    公开(公告)日：1979-10-16

    申请号：US802835

    申请日：1977-06-02

    Applicant: Chi-Shin Wang ,  Ching-Lin Jiang

    Inventor： Chi-Shin Wang ,  Ching-Lin Jiang

    IPC: H03M1/00 ,  H03K13/03

    CPC classification number: H03M1/442

    Abstract: Analog-to-digital conversion through successive approximation is implemented by means of a charge coupled device. During the conversion process two charges are compared, each comparison yielding one bit of a multi-bit number. By increasing the lesser of the compared charges after each comparison, the need to subtract charge as part of the successive approximation process is eliminated.

    Abstract translation: 通过逐次逼近的模数转换通过电荷耦合器件实现。 在转换过程中，比较两个电荷，每个比较产生一个多位数的一位。 通过在每次比较之后增加较小的比较电荷，消除了作为逐次逼近处理的一部分的电荷减去的需要。

    TEST SCRIPT GENERATION BASED ON EVENT DATA AND VIDEO FRAMES
    17.
    发明申请
    TEST SCRIPT GENERATION BASED ON EVENT DATA AND VIDEO FRAMES 有权

    公开(公告)号：US20220083458A1

    公开(公告)日：2022-03-17

    申请号：US17420337

    申请日：2019-01-11

    Applicant: Er-Xin SHANG ,  Bin ZHOU ,  Chao Lin JIANG ,  MICRO FOCUS LLC

    Inventor： Er-Xin SHANG ,  Bin ZHOU ,  Chao Lin JIANG

    IPC: G06F11/36

    Abstract: In some examples, a system processes event data and video frames produced by a program during execution of the program, the event data representing user actions with respect to a graphical user interface (GUI) of the program. The system identifies an area of the GUI that corresponds to a respective user action of the user actions, wherein identifying the area of the GUI uses a first video frame before an event corresponding to the respective user action, and a second video frame after the event corresponding to the respective user action. The system identifies, based on the identified area, a test object representing a user interface (UI) element, and generates a test script for testing the program, the test script including the test object.

    Packing Bag of Liquid Crystal Display and Packing Method Thereof
    18.
    发明申请
    Packing Bag of Liquid Crystal Display and Packing Method Thereof 审中-公开
    液晶显示包装袋及其包装方法

    公开(公告)号：US20130139475A1

    公开(公告)日：2013-06-06

    申请号：US13378594

    申请日：2011-12-07

    Applicant: Ying Wu ,  Lin Jiang

    Inventor： Ying Wu ,  Lin Jiang

    IPC: B65D33/16 ,  B65D33/00 ,  B65B25/00 ,  B65D81/00

    CPC classification number: B65D33/2591 ,  B65D2213/02 ,  B65D2585/6835

    Abstract: The invention discloses a packing bag of a liquid crystal display (LCD) and a packing method thereof. The packaging bag of a liquid crystal display includes a bag body and an opening. A sealing structure which can be repeatedly unsealed/sealed is disposed at the opening. The invention adopts the sealing structure at the opening of the packing bag to conveniently seal/unseal the opening of the packing bag. Therefore, the packing bag can be circularly reused and decrease the cost. The packing bag is sealed by the sealing structure without folding of the packing bag to decrease material of the packing bag and further decrease the cost.

    Abstract translation: 本发明公开了一种液晶显示器（LCD）的包装袋及其包装方法。 液晶显示器的包装袋包括袋体和开口。 可以在开口处设置可重复开封/密封的密封结构。 本发明在包装袋的开口处采用密封结构，方便地密封/开封包装袋的开口。 因此，包装袋可以循环重复使用，降低成本。 包装袋由密封结构密封，不折叠包装袋，减少包装袋的材料，进一步降低成本。

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