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公开(公告)号：US20230180552A1
公开(公告)日：2023-06-08
申请号：US17924137
申请日：2021-01-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Bo WANG , Fuqiang LI , Yipeng CHEN
IPC: H10K59/131 , H10K59/121
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216
Abstract: A base substrate of a display substrate includes a display region; a plurality of pixel units in the display region, each pixel unit includes a first pixel circuit and a second pixel circuit adjacent to each other in a first direction; an initialization signal line extending in the first direction and supplying an initialization signal to the first pixel circuit and the second pixel circuit; a first control signal line extending in the first direction and supplying a gate signal to the first pixel circuit and the second pixel circuit; and a light-emitting control signal line extending in the first direction and supplying a light-emitting control signal to the first pixel circuit and the second pixel circuit; the initialization signal line is on a side of the light-emitting control signal line away from the first control signal line, extends along the first direction and includes segments arranged at intervals.
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公开(公告)号：US20230132313A1
公开(公告)日：2023-04-27
申请号：US17907027
申请日：2021-10-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ming YANG , Zhenyu ZHANG , Chuanxiang XU , Fuqiang LI , Yawei WANG , Chenyang ZHANG
IPC: H10K59/121
Abstract: A display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area including a first and a second display area; a first group of light-emitting devices located at the first display area; a first group of pixel driving circuits located at the second display area, configured to drive at least one first light-emitting device; a second group of light-emitting devices located at the second display area; and a second group of pixel driving circuits located at the second display area, and including a plurality of second pixel driving circuits configured to drive the plurality of second light-emitting devices. In a direction perpendicular to the base substrate, one group of pixel driving circuits of the first and second group of pixel driving circuits is located between the other group of pixel driving circuits and the base substrate.
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公开(公告)号：US20220350209A1
公开(公告)日：2022-11-03
申请号：US17429676
申请日：2020-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Chenyang ZHANG , Fuqiang LI , Ming YANG , Pengxia LIANG , Jiahui HAN
IPC: G02F1/1362
Abstract: The disclosure provides a display substrate, a display panel and a display device. The display substrate has a display area and a peripheral area surrounding the display area, and includes: a first base; multiple pixel units in the display area and on the first base, each pixel units includes a thin film transistor and a first electrode, in each pixel unit, a second electrode of the thin film transistor is electrically coupled with the first electrode through a first via hole penetrating through an interlayer insulating layer; and an auxiliary functional layer located in the display area and on a side, away from the first base, of the first electrode; an orthographic projection of the auxiliary functional layer on the first base covers at least a part of an orthographic projection of the first via hole on the first base, and defines an active display area of each first electrode.
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公开(公告)号：US20220130310A1
公开(公告)日：2022-04-28
申请号：US17355954
申请日：2021-06-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhichong WANG , Guangcai YUAN , Fuqiang LI , Liwei LIU , Jing FENG , Peng LIU , Xinglong LUAN
IPC: G09G3/20
Abstract: A gate driving circuit unit, a gate driving circuit and a display device are provided. The gate driving circuit unit includes a pull-up node noise-reduction circuit and a pull-up control circuit. The pull-up node noise-reduction circuit is electrically connected to an input end, a pull-down node and a pull-up node, and configured to control the pull-up node to be electrically connected to, or electrically disconnected from, the input end under the control of a potential at the pull-down node. The pull-up control circuit is electrically connected to the pull-up node and the input end, and configured to control the pull-up node to be electrically connected to the input end at an input stage.
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公开(公告)号：US20220130309A1
公开(公告)日：2022-04-28
申请号：US17355858
申请日：2021-06-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhichong WANG , Guangcai YUAN , Fuqiang LI , Jing FENG , Xinglong LUAN , Peng LIU
IPC: G09G3/20
Abstract: A gate driving unit includes: a pull-up node denoising circuit; a pull-down node control circuit; a pull-up node control circuit; and an energy storage circuit. The pull-up node denoising circuit is configured to, under control of a potential of the pull-down node, control coupling or discoupling between the first pull-up node and the input terminal. The pull-down node control circuit is configured to, under control of a control voltage, control the potential of the pull-down node; under control of a potential of the second pull-up node, control coupling or discoupling between the pull-down node and the input terminal. The pull-up node control circuit is configured to, under control of an anti-leakage control voltage, control coupling or discoupling between the first pull-up node and the second pull-up node, and configured to maintain the potential of the second pull-up node. The energy storage circuit is configured to store electric energy.
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Patent Agency Ranking
公开(公告)号：US20210408081A1
公开(公告)日：2021-12-30
申请号：US16605588
申请日：2019-04-08
Inventor： Peng LIU , Fuqiang LI , Jun FAN , Bailing LIU , Jianjun ZHANG , Yusheng LIU , Mei LI
IPC: H01L27/12 , H01L29/786 , H01L29/66 , G06F3/041
Abstract: An array substrate, a method of manufacturing an array substrate, a display panel, and an electronic device are provided. The array substrate includes a display area and a peripheral area; the display area includes a pixel region, the pixel region includes a first thin film transistor, and the first thin film transistor includes a first active layer; the peripheral area includes a second thin film transistor, and the second thin film transistor includes a second active layer; and the first active layer includes a material of oxide semiconductor, and the second active layer includes a material of poly-silicon semiconductor.
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公开(公告)号：US20210166602A1
公开(公告)日：2021-06-03
申请号：US17051738
申请日：2020-01-21
Inventor： Zhichong WANG , Fuqiang LI , Jing FENG , Peng LIU , Xinglong LUAN
Abstract: A shift register includes a first transistor, a second transistor, a pull-up node and a switch sub-circuit. A control electrode of the first transistor is connected to a signal input terminal, a first electrode of the first transistor is connected to a first voltage terminal, and a second electrode of the first transistor is connected to a first control node. A control electrode of the second transistor is connected to a reset signal terminal, a first electrode of the second transistor is connected to a second voltage terminal, and a second electrode of the second transistor is connected to the first control node. The switching sub-circuit is connected to the first control node and the pull-up node, and is configured to control a line between the first control node and the pull-up node to be closed and opened.
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公开(公告)号：US20200160769A1
公开(公告)日：2020-05-21
申请号：US16622756
申请日：2018-11-12
Inventor： Yishan FU , Jun FAN , Fuqiang LI , Jiguo WANG
Abstract: A gate driving sub-circuit, a driving method and a gate driving circuit are provided. The gate driving sub-circuit includes an input signal end, a shift signal output end, an inverted phase shift signal output end, a positive phase shift clock signal input end, an inverted phase shift clock signal input end, a first control clock signal input end, a second control clock signal input end, a first gate driving signal output end, a second gate driving signal output end, a shift register circuit and a control output circuit. The control output circuit includes a first control output sub-circuit and a second control output sub-circuit.
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19.发明申请公开(公告)号：US20170330526A1
公开(公告)日：2017-11-16
申请号：US15522368
申请日：2015-12-11
Inventor： Jun FAN , Jie ZHANG , Fuqiang LI
CPC classification number: G09G3/3677 , G09G2300/0426 , G09G2310/0205 , G09G2310/0283 , G09G2310/0286 , G09G2310/08 , G09G2330/023 , G11C19/28
Abstract: An output control unit of a shift register, a shift register and a driving method thereof, and a gate driving device. The output control unit includes N pull-up units, N pull-down units, and N signal output terminals. The nth pull-up unit is connected with a pull-up node, a high voltage source, an nth clock signal input terminal and an nth pull-down unit, the nth pull-down unit is connected to a pull-down node and a low voltage power source, and a connection point of the nth pull-up unit and the nth pull-down unit is further connected to the nth signal output terminal. The output control unit is configured to: provide clock signals from N clock signal input terminals to the N signal output terminals respectively under the control of a voltage of the pull-up node, and pull down levels of output signals of the N signal output terminals.
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公开(公告)号：US20170178557A1
公开(公告)日：2017-06-22
申请号：US15129650
申请日：2015-12-31
Inventor： Fuqiang LI , Jun FAN , Xiaochuan CHEN , Xue DONG
IPC: G09G3/20 , G09G3/36 , G09G3/3266
CPC classification number: G09G3/2092 , G09G3/3266 , G09G3/3677 , G09G2310/0205 , G09G2310/0218 , G09G2310/0286 , G09G2310/08
Abstract: A display panel, driving method thereof and display apparatus are provided. The display panel comprises 4N gate lines, drive controlling circuit (1) connected to respective gate driving circuits and configured to output a group of timing control signals to respective gate driving circuits, and mode switching circuit (2) connected to drive controlling circuit (1), which can control drive controlling circuit (1) to drive all gate driving circuits to output scan signals sequentially to respective first gate line groups by taking two adjacent gate lines as first gate line group in scanning direction when receiving first mode control signal; and/or control drive controlling circuit (1) to drive all gate driving circuits to output scan signals sequentially to respective second gate line groups by taking four adjacent gate lines as second gate line group in scanning direction when receiving second mode control signal. Therefore, power consumption can be reduced, and standby-time can be prolonged.
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