公开(公告)号：US12223900B2

公开(公告)日：2025-02-11

申请号：US18272811

申请日：2022-07-29

Applicant: Hefei BOE Joint Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Zhidong Yuan ,  Yongqian Li ,  Can Yuan ,  Liu Wu ,  Xiuting Liu ,  Luke Ding ,  Cheng Xu ,  Miao Liu ,  Xing Yao

IPC: G09G3/3233 ,  G11C19/28 ,  H10K59/131

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

公开(公告)号：US20220020867A1

公开(公告)日：2022-01-20

申请号：US17449607

申请日：2021-09-30

Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jun Liu ,  Luke Ding ,  Jingang Fang ,  Bin Zhou ,  Leilei Cheng ,  Wei Li

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/475 ,  H01L29/40 ,  H01L21/4757 ,  H01L27/12 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213

Abstract: A manufacturing method of a display substrate, a display substrate, and a display device. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 μm and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.

公开(公告)号：US20200155717A1

公开(公告)日：2020-05-21

申请号：US16442860

申请日：2019-06-17

Applicant: Hefei Xinsheng Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Guangyao Li ,  Luke Ding ,  Leilei Cheng ,  Yingbin Hu ,  Jingang Fang ,  Ning Liu ,  Qinghe Wang ,  Dongfang Wang ,  Liangchen Yan

IPC: A61L2/03 ,  C01B32/182

Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.

公开(公告)号：US20200035836A1

公开(公告)日：2020-01-30

申请号：US16393023

申请日：2019-04-24

Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yingbin Hu ,  Ce Zhao ,  Yuankui Ding ,  Wei Li ,  Wei Song ,  Luke Ding ,  Jun Liu ,  Liangchen Yan

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/32

Abstract: Provided is a thin film transistor, including: a conductive light shielding layer; a metal oxide layer arranged on the light shielding layer; a buffer layer, an active layer, a gate insulating layer, a gate electrode, and an interlayer insulating layer arranged in sequence on the metal oxide layer, the interlayer insulating layer and the buffer layer comprising a first via hole and a second via hole for exposing the active layer, and a third via hole for exposing the metal oxide layer, in which a portion of the metal oxide layer exposed through the third via hole is a conductive portion, and other portions are insulative; and a source electrode and a drain electrode arranged on the interlayer insulating layer, in which the source electrode is connected to the active layer through the first via hole, and the drain electrode is connected to the active layer through the second via hole and connected to the conductive portion through the third via hole.

公开(公告)号：US20240363737A1

公开(公告)日：2024-10-31

申请号：US18769204

申请日：2024-07-10

Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jun Liu ,  Luke Ding ,  Jingang Fang ,  Bin Zhou ,  Leilei Cheng ,  Wei Li

IPC: H01L29/66 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/44 ,  H01L21/475 ,  H01L21/4757 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/40 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/0274 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/44 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1288 ,  H01L29/401 ,  H01L29/7869 ,  H01L29/41733 ,  H01L29/78633

Abstract: Provided are a manufacturing method of a display substrate, a display substrate, and a display device. The display substrate includes: a base substrate; and a top-gate type thin film transistor located on a side of the base substrate, the top-gate type thin film transistor comprises an active layer, a gate insulation layer and a gate electrode sequentially disposed in a direction away from the base substrate. A side surface of the gate insulation layer close to the gate electrode extends beyond an edge of the gate electrode in a direction parallel to the base substrate, and a side surface of the active layer close to the gate insulation layer extends beyond an edge of the gate insulation layer in the direction parallel to the base substrate.

公开(公告)号：US20240233644A1

公开(公告)日：2024-07-11

申请号：US18547182

申请日：2022-09-30

Applicant: Hefei BOE Joint Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Liu Wu ,  Can Yuan ,  Zhidong Yuan ,  Cheng Xu ,  Luke Ding ,  Yongqian Li ,  Xiuting Liu

IPC: G09G3/3233 ,  H10K59/131

CPC classification number: G09G3/3233 ,  H10K59/131 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0221 ,  G09G2310/04 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0435

Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.

公开(公告)号：US11114469B2

公开(公告)日：2021-09-07

申请号：US16396726

申请日：2019-04-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Bin Zhou ,  Binbin Cao ,  Liangchen Yan ,  Dongfang Wang ,  Ce Zhao ,  Luke Ding ,  Jun Liu

IPC: H01L27/12

Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.

公开(公告)号：US11069725B2

公开(公告)日：2021-07-20

申请号：US16399508

申请日：2019-04-30

Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jun Liu ,  Luke Ding ,  Ning Liu ,  Wei Li ,  Bin Zhou ,  Liangchen Yan

IPC: H01L27/12 ,  H01L21/311 ,  H01L21/3213

Abstract: A display substrate and a method of preparing the same, and a display device are provided, the method including: providing a substrate; forming a switching thin film transistor precursor and a driving thin film transistor precursor on the substrate, each including a semiconductor layer, a gate insulating material layer and a gate metallic layer stacked sequentially above the substrate; forming a photoresist layer above the switching thin film transistor precursor and the driving thin film transistor precursor, and forming an etching mask from the photoresist layer, a first portion of the etching mask at the switching thin film transistor precursor and a second portion of the etching mask at the driving thin film transistor precursor having different shapes; and forming a switching thin film transistor and a driving thin film transistor, by etching processing the switching thin film transistor precursor and the driving thin film transistor precursor with the etching mask.

公开(公告)号：US20210124226A1

公开(公告)日：2021-04-29

申请号：US16964278

申请日：2019-12-13

Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE Technology Group Co., Ltd.

Inventor： Leilei Cheng ,  Jingang Fang ,  Luke Ding ,  Jun Liu ,  Wei Li ,  Bin Zhou

IPC: G02F1/1362 ,  H01L21/768 ,  H01L23/532 ,  H01L27/12

Abstract: A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.

公开(公告)号：US20190157432A1

公开(公告)日：2019-05-23

申请号：US15983055

申请日：2018-05-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Jun Liu ,  Luke Ding ,  Jiangang Fang ,  Bin Zhou ,  Leilei Cheng ,  Wei Li

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/4757 ,  H01L21/475 ,  H01L29/40

Abstract: A manufacturing method of a display substrate, a display substrate, and a display device are disclosed. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 μm and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.