公开(公告)号：US09344046B2

公开(公告)日：2016-05-17

申请号：US14144262

申请日：2013-12-30

Applicant: Broadcom Corporation

Inventor： Zhengyu Wang ,  Iuri Mehr ,  Jungwoo Song ,  Xicheng Jiang

IPC: H03F3/217

CPC classification number: H03F3/2175 ,  H03F3/217 ,  H03F2200/351

Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法，系统和装置。 在实施例中，数字D类放大器包括PWM级，输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差，基于此产生数字脉宽调制（PWM）信号，并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号，并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示，以产生数字反馈信号的第二分量。

公开(公告)号：US09225234B2

公开(公告)日：2015-12-29

申请号：US13843202

申请日：2013-03-15

Applicant: BROADCOM CORPORATION

Inventor： I-Ning Ku ,  Hui Zheng ,  Xicheng Jiang

IPC: G05F1/575 ,  H02M1/36 ,  G05F1/56 ,  H02M3/07

CPC classification number: H02M1/36 ,  G05F1/56 ,  H02M3/07

Abstract: A circuit for a charge-pump low-dropout (LDO) regulator may include a comparator circuit configured to control a pass transistor based on an error signal. A pre-charge path may be provided between a supply voltage and an output node of the regulator. The pre-charge path may be configured to allow charging of an output capacitor to a pre-charge voltage during a pre-charge operation mode. The output capacitor may be coupled between the output node of the regulator and ground potential. The pass transistor may be configured to allow charging of the output capacitor during an LDO mode of operation. A charge-pump circuit may be configured to provide a current for charging the output capacitor during the LDO mode of operation.

Abstract translation: 用于电荷泵低压差（LDO）调节器的电路可以包括被配置为基于误差信号来控制传输晶体管的比较器电路。 可以在调节器的电源电压和输出节点之间提供预充电路径。 预充电路径可以被配置为允许在预充电操作模式期间将输出电容器充电到预充电电压。 输出电容器可以耦合在调节器的输出节点和地电位之间。 传输晶体管可以被配置为允许在LDO操作模式期间对输出电容器进行充电。 电荷泵电路可以被配置为在LDO操作模式期间提供用于对输出电容器充电的电流。

公开(公告)号：US20150155771A1

公开(公告)日：2015-06-04

申请号：US14139257

申请日：2013-12-23

Applicant: Broadcom Corporation

Inventor： I-Ning Ku ,  Hui Zheng ,  Jungwoo Song ,  Xicheng Jiang

IPC: H02M1/14 ,  H02M3/07

CPC classification number: H02M1/14 ,  H02M3/07 ,  H02M2003/077

Abstract: Systems, apparatuses, and methods provided for ping-pong charge pumps. Flying capacitors present in ping-pong charge pumps are operated out of phase to increase equalization periods. Out-of-phase operation also decreases voltage differences between flying capacitors during equalization periods thus decreasing ping-pong charge pump output voltage ripple and snapback. The voltages of the flying capacitors may be equalized without the use of an equalization switch. Differential control currents that are based on the voltage difference between the flying capacitors are used to enable or disable the flying capacitors from driving an output load of the ping-pong charge pump during certain phases of operation. A capacitor with a lower voltage may be disabled, thus providing for voltage equalization as the enabled capacitor sources current to the output load. The flying capacitors are also equalized during overlapping time periods in which the flying capacitors are charging.

Abstract translation: 为乒乓电荷泵提供的系统，设备和方法。 乒乓电荷泵中存在的飞电容器异相运行，以增加均衡周期。 异相操作也会在均衡期间降低飞溅电容器之间的电压差，从而减少乒乓电荷泵输出电压纹波和回跳。 可以在不使用均衡开关的情况下使飞行电容器的电压相等。 基于飞跨电容器之间的电压差的差分控制电流用于在某些操作阶段启用或禁用飞镖电容器驱动乒乓电荷泵的输出负载。 可以禁用具有较低电压的电容器，从而在使能电容器电流流向输出负载时提供电压均衡。 飞行电容器在飞行电容器充电的重叠时间段期间也相等。

公开(公告)号：US08923492B2

公开(公告)日：2014-12-30

申请号：US13850355

申请日：2013-03-26

Applicant: Broadcom Corporation

Inventor： Hui Zheng ,  Sasi Kumar Arunachalam ,  Alex Jianzhong Chen ,  Aravind Kumar Padyana ,  I-Ning Ku ,  Jungwoo Song ,  Xicheng Jiang

IPC: H04M11/00

CPC classification number: H04M11/00 ,  H04M11/062

Abstract: A multi-mode line driver circuit designed to be fabricated in a CMOS process and capable of supporting a plurality of operating modes corresponding, for example, to different profiles of communication standards such as xDSL standards. The line driver circuit incorporates integrated mode switches with a two-stage amplifier architecture to relax amplifier requirements by distributing the signal gain into two amplifier stages. Reconfigurable feedback loops are provided to permit design optimization for particular modes of operation (e.g., ADSL and VDSL compliant modes). In one embodiment implemented as a Class-H amplifier, lift amplifier(s) are provided between a first amplifier stage and a second amplifier stage for controlling voltage supply levels of the second amplifier stage. The lift amplifiers may be enabled by voltage threshold detection circuitry that monitors either the input or the output signals of the first amplifier stage depending on the operable transmission mode.

Abstract translation: 设计为以CMOS工艺制造并能够支持多个操作模式的多模式线路驱动器电路，其例如对应于诸如xDSL标准的通信标准的不同简档。 线路驱动器电路集成了具有两级放大器架构的集成模式开关，通过将信号增益分配到两个放大器级来放大放大器要求。 提供可重构的反馈回路以允许针对特定操作模式（例如，ADSL和VDSL兼容模式）的设计优化。 在实现为H类放大器的一个实施例中，提升放大器设置在第一放大器级和第二放大级之间，用于控制第二放大级的电压电平。 升压放大器可以由电压阈值检测电路使能，电压阈值检测电路根据可操作的传输模式来监视第一放大器级的输入或输出信号。

公开(公告)号：US20140254779A1

公开(公告)日：2014-09-11

申请号：US13850355

申请日：2013-03-26

Applicant: BROADCOM CORPORATION

Inventor： Hui Zheng ,  Sasi Kumar Arunachalam ,  Alex Jianzhong Chen ,  Aravind Kumar Padyana ,  I-Ning Ku ,  Jungwoo Song ,  Xicheng Jiang

IPC: H04M11/00

CPC classification number: H04M11/00 ,  H04M11/062

Abstract: A multi-mode line driver circuit designed to be fabricated in a CMOS process and capable of supporting a plurality of operating modes corresponding, for example, to different profiles of communication standards such as xDSL standards. The line driver circuit incorporates integrated mode switches with a two-stage amplifier architecture to relax amplifier requirements by distributing the signal gain into two amplifier stages. Reconfigurable feedback loops are provided to permit design optimization for particular modes of operation (e.g., ADSL and VDSL compliant modes). In one embodiment implemented as a Class-H amplifier, lift amplifier(s) are provided between a first amplifier stage and a second amplifier stage for controlling voltage supply levels of the second amplifier stage. The lift amplifiers may be enabled by voltage threshold detection circuitry that monitors either the input or the output signals of the first amplifier stage depending on the operable transmission mode.

Abstract translation: 设计为以CMOS工艺制造并能够支持多个操作模式的多模式线路驱动器电路，其例如对应于诸如xDSL标准的通信标准的不同简档。 线路驱动器电路集成了具有两级放大器架构的集成模式开关，通过将信号增益分配到两个放大器级来放大放大器要求。 提供可重构的反馈回路以允许针对特定操作模式（例如，ADSL和VDSL兼容模式）的设计优化。 在实现为H类放大器的一个实施例中，提升放大器设置在第一放大器级和第二放大级之间，用于控制第二放大级的电压电平。 升压放大器可以由电压阈值检测电路使能，电压阈值检测电路根据可操作的传输模式来监视第一放大器级的输入或输出信号。

公开(公告)号：US08824538B2

公开(公告)日：2014-09-02

申请号：US13895891

申请日：2013-05-16

Applicant: Broadcom Corporation

Inventor： Aaron Buchwald ,  Xicheng Jiang ,  Hui Wang ,  Howard A. Baumer ,  Avanindra Madisetti

IPC: H03H7/30

CPC classification number: H04L25/03885 ,  H03L7/07 ,  H03L7/0814 ,  H03L7/091 ,  H04L7/0025 ,  H04L7/0274 ,  H04L7/0337 ,  H04L25/03006 ,  H04L2025/03477 ,  H04L2025/03617

Abstract: Methods and systems adaptively equalizing an analog information signal, the method including sampling the analog information signal to provide analog samples including post-transition samples and steady-state samples, and equalizing the analog samples to produce equalized analog samples. The equalizing includes determining a difference between an average post-transition amplitude associated with at least one of the post-transition samples and an average steady-state amplitude associated with at least one of the steady-state samples, and adjusting an equalization coefficient to adjust the difference between the average post-transition amplitude and the average steady-state amplitude.

Abstract translation: 方法和系统自适应地均衡模拟信息信号，所述方法包括对模拟信息信号进行采样以提供包括转移后样本和稳态样本的模拟样本，并均衡模拟样本以产生均衡的模拟样本。 均衡包括确定与转移后样本中的至少一个相关联的平均过渡后幅度与与稳态样本中的至少一个相关联的平均稳态幅度之间的差，并且调整均衡系数以进行调整 平均转移后幅度和平均稳态幅度之间的差异。

公开(公告)号：US20130251020A1

公开(公告)日：2013-09-26

申请号：US13895891

申请日：2013-05-16

Applicant: Broadcom Corporation

Inventor： Aaron Buchwald ,  Xicheng Jiang ,  Hui Wang ,  Howard A. Baumer ,  Avanindra Madisetti

IPC: H04L25/03

CPC classification number: H04L25/03885 ,  H03L7/07 ,  H03L7/0814 ,  H03L7/091 ,  H04L7/0025 ,  H04L7/0274 ,  H04L7/0337 ,  H04L25/03006 ,  H04L2025/03477 ,  H04L2025/03617

Abstract: Methods and systems adaptively equalizing an analog information signal, the method including sampling the analog information signal to provide analog samples including post-transition samples and steady-state samples, and equalizing the analog samples to produce equalized analog samples. The equalizing includes determining a difference between an average post-transition amplitude associated with at least one of the post-transition samples and an average steady-state amplitude associated with at least one of the steady-state samples, and adjusting an equalization coefficient to adjust the difference between the average post-transition amplitude and the average steady-state amplitude.

Abstract translation: 方法和系统自适应地均衡模拟信息信号，所述方法包括对模拟信息信号进行采样以提供包括转移后样本和稳态样本的模拟样本，并均衡模拟样本以产生均衡的模拟样本。 均衡包括确定与转移后样本中的至少一个相关联的平均过渡后幅度与与稳态样本中的至少一个相关联的平均稳态幅度之间的差，并且调整均衡系数以进行调整 平均转移后幅度和平均稳态幅度之间的差异。

公开(公告)号：US20130064399A1

公开(公告)日：2013-03-14

申请号：US13650447

申请日：2012-10-12

Applicant: Broadcom Corporation

Inventor： Xicheng Jiang

IPC: H04R3/00

CPC classification number: H04R3/00 ,  H04R2410/00

Abstract: A disclosed embodiment is a programmable integrated circuit such as an audio processor or a base band processor for generating a low noise and programmable microphone bias voltage or current. The programmable integrated circuit generates a programmable reference input, where the reference input is programmably generated from at least one power source, such as a on-chip audio power supply, an on-chip power supply, or an off-chip power supply, for use by a regulator. The regulator in the programmable integrated circuit receives a bias input and the programmable reference input and generates a programmable output for biasing a microphone. The bias input for the regulator can be provided by an off-chip power supply or an on-chip power supply. The reference input provided to the regulator can be appropriately filtered to reduce noise. In one embodiment, the programmable reference input and the programmable output are programmed by first and second potentiometers, respectively.

Abstract translation: 所公开的实施例是诸如音频处理器或基带处理器的可编程集成电路，用于产生低噪声和可编程麦克风偏置电压或电流。 可编程集成电路产生可编程参考输入，其中参考输入可由至少一个电源（例如片上音频电源，片上电源或芯片外电源）至少可编程地产生，用于 由监管机构使用。 可编程集成电路中的调节器接收偏置输入和可编程参考输入，并产生用于偏置麦克风的可编程输出。 调节器的偏置输入可以由片外电源或片上电源提供。 提供给调节器的参考输入可以被适当地过滤以减少噪声。 在一个实施例中，可编程参考输入和可编程输出分别由第一和第二电位器编程。