公开(公告)号：US20230328720A1

公开(公告)日：2023-10-12

申请号：US17717032

申请日：2022-04-08

Applicant: EdgeQ, Inc.

Inventor： Gururaj Padaki ,  Sriram Rajagopal ,  Vinay Ravuri

IPC: H04W72/12 ,  H04W72/04 ,  H04L5/00

CPC classification number: H04W72/1268 ,  H04W72/1252 ,  H04L5/0053 ,  H04L5/0051 ,  H04W72/0446

Abstract: System and method embodiments are disclosed to improve radio access network coverage area, increase throughput, and reduce power consumption in user equipment (UE). Downlink (DL) and uplink (UL) are disaggregated in one or more radio units (RUs). A UE receives DL data packets from a DL RU and uploads UL data packets to a UL RU disaggregated from the DL RU. The UL RU couples to a distributed unit (DU) directly or via the DL RU such that an acknowledgment or error message for successful or unsuccessful reception of the UL data packets may be sent back to the UE via the DL RU. The DU may track a UE motion trajectory and re-map UL traffic from one UL RU to another UL RU. Embodiments of DL/UL disaggregation may improve power efficiency and be advantageous for various applications such as internet of things, cyber physical systems, 5G communications, etc.

公开(公告)号：US20230305959A1

公开(公告)日：2023-09-28

申请号：US17705334

申请日：2022-03-27

Applicant: EdgeQ, Inc.

Inventor： Ankit Jindal ,  Pranavkumar Govind Sawargaonkar ,  Sriram Rajagopal

IPC: G06F12/0811 ,  G06F12/0862 ,  G06F15/78 ,  G06F9/50 ,  G06F9/30

CPC classification number: G06F12/0811 ,  G06F12/0862 ,  G06F15/7807 ,  G06F9/5016 ,  G06F9/30047

Abstract: In a typical data plane application, there is a packet dispatcher which receives packets from the underlying subsystem for distribution among various threads/processes for further processing. These threads/processes may run on various processing elements (PEs) and pass through multiple stages of processing. As new generation system-on-a-chip (SoC) architectures have multiple heterogeneous clusters with corresponding PEs, packet processing may traverse through multiple PEs in different clusters. Since latencies/performance for different clusters/PEs may be different, packet processing on the SoC may take a variable amount of time, which may lead to unpredictable latencies. The present disclosure provides embodiments to solve the problem of packet processing on heterogeneous clusters/PEs by providing a fast path enabler to the applications for SoC architecture awareness. The fast path enabler understands the cache topology of the SoC and may pre-fetch packets to the desired cache to minimize latencies for improved performance.

公开(公告)号：US11758532B2

公开(公告)日：2023-09-12

申请号：US18082555

申请日：2022-12-15

Applicant: EdgeQ, Inc.

Inventor： Vinay Ravuri ,  Sriram Rajagopal

IPC: H04W72/12

CPC classification number: H04W72/12

Abstract: Advances in wireless technologies have resulted in the ability of a 5G communication system to support multiple wireless communication applications. Each of these applications requires special handling in all layers and more so in scheduler and physical layer. The present disclosure presents embodiments of dynamical creating a computation instance with a slice of resources allocated for each scheduling input. Each computation instance may be independently managed, controlled, and customized according to the specific requirements of the corresponding scheduling input. Such a dynamic resource allocation allows large number of slices in PHY layer. Furthermore, when overloading happens, one scheduling inputs may be migrated from one distribution unit (DU) to another DU without interruption for end users during scheduling migration. Accordingly, efficiency and robustness of a 5G communication system may be improved to serve multiple wireless communication applications.

公开(公告)号：US20230026248A1

公开(公告)日：2023-01-26

申请号：US17380640

申请日：2021-07-20

Applicant: EdgeQ, Inc.

Inventor： Vinay Ravuri ,  Chaekwan Lee ,  Hariprasad Gangadharan ,  Umesh Dattatraya Nimbhorkar ,  Vishwanatha Tarikere Basavaraja ,  Sriram Rajagopal ,  Tae Ryun Chang ,  Gopalakrishnan Perur Krishnan

IPC: H04W40/02 ,  H04W24/02

Abstract: Advances in wireless technologies have resulted in the ability of a wireless communication system to support wireless communications of different standards, e.g., 5G, LTE, and Wi-Fi. Different Wireless standards have aspects which are very different from each other. Described in the present disclosure are embodiments of architecture with hardware and software split to allow implementation of different wireless standards along a configurable signal process path. The configurable signal process path comprises software configurable operators that may be configured in a desired level of granularity to load desirable software to process signals of various standards on the same hardware. Embodiments of the disclosed architecture with hybrid hardware and software implementation may improve system operation efficiency and lower system complexity to serve communications across multiple wireless standards.

公开(公告)号：US20230007664A1

公开(公告)日：2023-01-05

申请号：US17366677

申请日：2021-07-02

Applicant: EdgeQ, Inc.

Inventor： Vinay Ravuri ,  Sriram Rajagopal

IPC: H04W72/12

Abstract: Advances in wireless technologies have resulted in the ability of a 5G communication system to support multiple wireless communication applications. Each of these applications requires special handling in all layers and more so in scheduler and physical layer. The present disclosure presents embodiments of dynamical creating a computation instance with a slice of resources allocated for each scheduling input. Each computation instance may be independently managed, controlled, and customized according to the specific requirements of the corresponding scheduling input. Such a dynamic resource allocation allows large number of slices in PHY layer. Furthermore, when overloading happens, one scheduling inputs may be migrated from one distribution unit (DU) to another DU without interruption for end users during scheduling migration. Accordingly, efficiency and robustness of a 5G communication system may be improved to serve multiple wireless communication applications.

公开(公告)号：US11917612B2

公开(公告)日：2024-02-27

申请号：US17367787

申请日：2021-07-06

Applicant: EdgeQ, Inc.

Inventor： Hersh Vardhan Shukla ,  Sriram Rajagopal

IPC: H04W72/1268 ,  G06N5/04 ,  G06N20/00 ,  H04L43/028 ,  H04W72/23 ,  H04L5/00 ,  H04W80/06

CPC classification number: H04W72/1268 ,  G06N5/04 ,  G06N20/00 ,  H04L43/028 ,  H04W72/23 ,  H04L5/0055 ,  H04W80/06

Abstract: In a grant based system, a user equipment (UE) sends data in an uplink in a request-grant process. The UE first sending a scheduling request, a gNodeB processing the request and scheduling a grant sometime in future, then UE then either sending data if the grant is sufficient or requesting for another grant with more capacity to accommodate data sending. Such a proceeding could cause serious latency in network access. Described in the present patent disclosure are embodiments to reduce the access time by giving proactive grants through inspecting downlink (DL) data sent to the UE or uplink data being transmitted from the UE. The uplink data may be predictive since it maybe in lieu of requirement for sending a TCP acknowledgement for the DL TCP data scheduled earlier. For voice calls, a ML system for system may be deployed to predict when proactive UL grants may be given.

公开(公告)号：US11892948B2

公开(公告)日：2024-02-06

申请号：US17705334

申请日：2022-03-27

Applicant: EdgeQ, Inc.

Inventor： Ankit Jindal ,  Pranavkumar Govind Sawargaonkar ,  Sriram Rajagopal

IPC: G06F12/08 ,  G06F12/0811 ,  G06F12/0862 ,  G06F9/30 ,  G06F9/50 ,  G06F15/78

CPC classification number: G06F12/0811 ,  G06F9/30047 ,  G06F9/5016 ,  G06F12/0862 ,  G06F15/7807

Abstract: In a typical data plane application, there is a packet dispatcher which receives packets from the underlying subsystem for distribution among various threads/processes for further processing. These threads/processes may run on various processing elements (PEs) and pass through multiple stages of processing. As new generation system-on-a-chip (SoC) architectures have multiple heterogeneous clusters with corresponding PEs, packet processing may traverse through multiple PEs in different clusters. Since latencies/performance for different clusters/PEs may be different, packet processing on the SoC may take a variable amount of time, which may lead to unpredictable latencies. The present disclosure provides embodiments to solve the problem of packet processing on heterogeneous clusters/PEs by providing a fast path enabler to the applications for SoC architecture awareness. The fast path enabler understands the cache topology of the SoC and may pre-fetch packets to the desired cache to minimize latencies for improved performance.

公开(公告)号：US20230216624A1

公开(公告)日：2023-07-06

申请号：US18082556

申请日：2022-12-15

Applicant: EdgeQ, Inc.

Inventor： Vinoth Nagarajan ,  Sriram Rajagopal

IPC: H04L5/00 ,  H04W72/0453

CPC classification number: H04L5/0032 ,  H04W72/0453 ,  H04L5/0046 ,  H04L5/0066

Abstract: With advanced compute capabilities and growing convergence of wireless standards, it is desirable to run multiple wireless standards, e.g., 4G, 5G NR, and Wi-Fi, on a single signal processing system, e.g., a system on a chip (SoC). Such an implementation may require simultaneously receiving and transmitting signals corresponding to each wireless standard and also signal processing according to respective requirements. Typical solutions involve providing separate hardware blocks specific to each wireless standard, which in turn requires more area on the SoC and consumes more power. Embodiments of the present disclosure provide a unified hardware that may process signals across different standards in both a transmitting direction and a receiving direction simultaneously.

公开(公告)号：US11690089B2

公开(公告)日：2023-06-27

申请号：US17380590

申请日：2021-07-20

Applicant: EdgeQ, Inc.

Inventor： Vinay Ravuri ,  Sriram Rajagopal ,  Mathivanan Prabhakaran

IPC: H04W72/50 ,  H04W72/044 ,  H04L5/00 ,  H04W72/52 ,  H04W72/56

CPC classification number: H04W72/535 ,  H04L5/0064 ,  H04W72/044 ,  H04W72/52 ,  H04W72/56

Abstract: With advanced compute capabilities and growing convergence of wireless standards, there is requirement to run multiple wireless standards, e.g., 4G, 5G, and Wi-Fi, on a single hardware together. Typical solution includes reserving some computing resources for specific wireless standards. Such a resource strategy may not be optimized or efficient according to the real needs for various wireless standards. The present disclosure presents embodiments of using a unified resource controller to take multiple scheduling inputs across various wireless standards, allocate resources among a plurality of configurable processing units, and manage hardware components for data path accelerations including forward error correction, and signal processing implementation. The multiplexing multiple wireless technologies based on spectral utilization may improve the efficiency in power consumption and hardware resources utilization.

公开(公告)号：US11576190B2

公开(公告)日：2023-02-07

申请号：US17366677

申请日：2021-07-02

Applicant: EdgeQ, Inc.

Inventor： Vinay Ravuri ,  Sriram Rajagopal

IPC: H04W72/12

Abstract: Advances in wireless technologies have resulted in the ability of a 5G communication system to support multiple wireless communication applications. Each of these applications requires special handling in all layers and more so in scheduler and physical layer. The present disclosure presents embodiments of dynamical creating a computation instance with a slice of resources allocated for each scheduling input. Each computation instance may be independently managed, controlled, and customized according to the specific requirements of the corresponding scheduling input. Such a dynamic resource allocation allows large number of slices in PHY layer. Furthermore, when overloading happens, one scheduling inputs may be migrated from one distribution unit (DU) to another DU without interruption for end users during scheduling migration. Accordingly, efficiency and robustness of a 5G communication system may be improved to serve multiple wireless communication applications.