公开(公告)号：US20220179359A1

公开(公告)日：2022-06-09

申请号：US17523197

申请日：2021-11-10

Applicant: Electronics and Telecommunications Research Institute ,  MVTECH

Inventor： Jae-Eun PI ,  Yong Hae KIM ,  Jong-Heon YANG ,  Chul Woong JOO ,  Chi-Sun HWANG ,  HA KYUN LEE ,  Seung Youl KANG ,  Gi Heon KIM ,  Joo Yeon KIM ,  Hee-ok KIM ,  Jeho NA ,  Jaehyun MOON ,  Won Jae LEE ,  Seong-Mok CHO ,  Ji Hun CHOI

IPC: G03H1/22 ,  G01B11/02 ,  G06T7/536

Abstract: Disclosed is an apparatus of analyzing a depth of a holographic image according to the present disclosure, which includes an acquisition unit that acquires a hologram, a restoration unit that restores a three-dimensional holographic image by irradiating the hologram with a light source, an image sensing unit that senses a depth information image of the restored holographic image, and an analysis display unit that analyzes a depth quality of the holographic image, based on the sensed depth information image, and the image sensing unit uses a lensless type of photosensor.

公开(公告)号：US20210124305A1

公开(公告)日：2021-04-29

申请号：US16988072

申请日：2020-08-07

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Hae KIM ,  Seong-Mok CHO ,  Chi-Sun HWANG ,  Ji Hun CHOI ,  Gi Heon KIM ,  Jong-Heon YANG ,  Sang Hoon CHEON ,  Kyunghee CHOI ,  Jae-Eun PI

IPC: G03H1/22

Abstract: Provided are a hologram display device and a method of manufacturing the hologram display device. The hologram display device includes a light source unit that emits light, a spatial light modulator that modulates the light emitted from the light source unit, and a random pinhole panel. The random pinhole panel includes a plurality of pinholes of a random position or a random size and is arranged in line with an output part of the spatial light modulator. In the hologram display device and the method of manufacturing the hologram display device, a position and size of a random pinhole on the random pinhole are not limited to inside each pixel of the spatial light modulator.

公开(公告)号：US20250138478A1

公开(公告)日：2025-05-01

申请号：US18917739

申请日：2024-10-16

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Hae KIM ,  Jong-Heon YANG ,  Kyunghee CHOI ,  Jae-Eun PI ,  Chi-Sun HWANG

IPC: G03H1/22

Abstract: Disclosed are a hologram reading device and a hologram reading method, the hologram reading device including a hologram element having a hologram pattern, a detector configured to detect a reflection beam generated in the hologram pattern, and a controller connected to the detector and configured to read information the hologram pattern using a detection signal of the reflection beam, wherein the hologram pattern may have the width or diameter smaller than 225 nm.

公开(公告)号：US20240061306A1

公开(公告)日：2024-02-22

申请号：US18342630

申请日：2023-06-27

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Hae KIM ,  Chi-Sun HWANG ,  Kyunghee CHOI ,  Joo Yeon KIM ,  Jaehyun MOON ,  Jong-Heon YANG ,  Ji Hun CHOI

IPC: G02F1/19

CPC classification number: G02F1/19

Abstract: Disclosed is a meta-structure. The meta-structure includes a lower electrode, a lower insulating layer on the lower electrode, a lower metal oxide layer on the lower insulating layer, a lower metal layer on the lower metal oxide layer, a middle metal oxide layer on the lower metal layer, an upper metal layer on the middle metal oxide layer, an upper metal oxide layer on the upper metal layer, an upper insulating layer on the upper metal oxide layer, and antenna electrodes on the upper insulating layer.

公开(公告)号：US20220199836A1

公开(公告)日：2022-06-23

申请号：US17523320

申请日：2021-11-10

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  Korea Advanced Institute of Science and Technology

Inventor： Chi-Sun HWANG ,  SangHee PARK ,  KwangHeum LEE ,  Jae-Eun PI ,  SeungHee LEE ,  Jong-Heon YANG ,  Ji Hun CHOI

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/40 ,  H01L29/49

Abstract: A vertical channel thin film transistor includes substrate, lower source/drain electrode, spacer layer, upper source/drain electrode covering portion of upper surface of the spacer layer, interlayer insulating pattern covering portion of upper surface of the upper source/drain electrode and upper surface of the spacer layer exposed by the upper source/drain electrode, contact hole disposed on the lower source/drain electrode and passing through the interlayer insulating pattern, the upper source/drain electrode, and the spacer layer, active pattern covering inner wall and bottom surface of the contact hole and extending over upper surface of the upper source/drain electrode and upper surface of the interlayer insulating pattern, gate insulating pattern filling portion of the contact hole and extending along upper surface of the active pattern, and gate electrode filling portion of the contact hole and extending along upper surface of the gate insulating pattern.

公开(公告)号：US20250098218A1

公开(公告)日：2025-03-20

申请号：US18762381

申请日：2024-07-02

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jae-Eun PI ,  Seung Youl KANG ,  Yong Hae KIM ,  Joo Yeon KIM ,  Hee-ok KIM ,  Jaehyun MOON ,  Jong-Heon YANG ,  Himchan OH ,  Seong-Mok CHO ,  Ji Hun CHOI ,  Chi-Sun HWANG

IPC: H01L29/417 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

Abstract: A thin film transistor includes a first gate electrode on a substrate, a gate insulating film on the first gate electrode, a first active layer on the gate insulating film, a drain electrode on one side of the first active layer, a sidewall spacer on a side wall of the drain electrode, and a first source electrode provided on the other side of the first active layer and a sidewall of the sidewall spacer.

公开(公告)号：US20250089300A1

公开(公告)日：2025-03-13

申请号：US18767665

申请日：2024-07-09

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Yong Hae KIM ,  Chi-Sun HWANG ,  Jong-Heon YANG ,  Seong-Mok CHO ,  Jae-Eun PI

IPC: H01L29/786 ,  H01L23/14 ,  H01L29/24 ,  H01L29/417 ,  H01L29/45

Abstract: Provided is an oxide thin film transistor. The transistor includes a gate electrode on a center of a substrate, an active layer provided on the gate electrode and the substrate and including a metal oxide, and a source electrode and a drain electrode provided on the active layer, which is on both sides of the gate electrode. The source electrode and the drain electrode may each include a first metal layer and a second metal layer on the first metal layer.

公开(公告)号：US20250013034A1

公开(公告)日：2025-01-09

申请号：US18596005

申请日：2024-03-05

Applicant: Electronics and Telecommunications Research Institute

Inventor： Chi-Sun HWANG ,  Yong Hae KIM ,  Joo Yeon KIM ,  Jaehyun MOON ,  Jong-Heon YANG ,  Kyunghee CHOI ,  Ji Hun CHOI

IPC: G02B26/08 ,  B82Y20/00 ,  G02F1/1343 ,  G02F1/137

Abstract: Disclosed is an active meta device. The device includes a metal reflective plate, an insulating layer on the metal reflective plate, a first modulation line block provided on one side of the insulating layer, and a second modulation line block provided on another side of the insulating layer facing the first modulation line block.

公开(公告)号：US20240006516A1

公开(公告)日：2024-01-04

申请号：US18321433

申请日：2023-05-22

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yong Hae KIM ,  Chi-Sun HWANG ,  Jong-Heon YANG

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/78642 ,  H01L29/78696 ,  H01L29/7869

Abstract: An embodiment of the inventive concept provides a thin film transistor and a manufacturing method of the same. The manufacturing method includes forming a data electrode on one side of a substrate, forming a spacer layer on a portion of the data electrode and the other side of the substrate, forming a drain electrode on a top surface of the spacer layer, forming an active layer on a sidewall of the spacer layer, the drain electrode, and the data electrode, forming a gate insulation film that covers the active layer on the sidewall of the spacer layer, and forming a doped layer on the gate insulation film and the active layer outside the gate insulation film to form impurity regions at both sides, respectively, of the active layer.

公开(公告)号：US20230091070A1

公开(公告)日：2023-03-23

申请号：US17889204

申请日：2022-08-16

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Ji Hun CHOI ,  Chan Woo PARK ,  Ji-Young OH ,  Seung Youl KANG ,  Yong Hae KIM ,  Hee-ok KIM ,  Jeho NA ,  Jaehyun MOON ,  Jong-Heon YANG ,  Himchan OH ,  Seong-Mok CHO ,  Sung Haeng CHO ,  Jae-Eun PI ,  Chi-Sun HWANG

IPC: H01B7/06 ,  H01B3/30 ,  H01B13/008 ,  H05K7/06

Abstract: Provided are stretchable electronics and a method for manufacturing the same. The stretchable electronics may include a substrate, a plurality of electronic elements disposed to be spaced apart from each other on the substrate, and a wire structure disposed on the substrate to connect the plurality of electronic elements to each other. The wire structure may include an insulator extending from one of the electronic elements to the other of the adjacent electronic elements and a metal wire configured to cover a top surface and side surfaces of the insulator. The insulator may include at least one bent part in a plan view.