公开(公告)号：US08981492B2

公开(公告)日：2015-03-17

申请号：US13928060

申请日：2013-06-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： O Sung Kwon ,  Xiaoqiang Zhang ,  Anurag Mittal

IPC: H01L21/8234 ,  H01L21/02 ,  H01L21/306 ,  H01L23/525 ,  H01L21/768 ,  H01L27/06

CPC classification number: H01L27/0629 ,  H01L21/76889 ,  H01L23/5225 ,  H01L23/5256 ,  H01L23/53261 ,  H01L27/101 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit product is disclosed that includes a resistor body and an e-fuse body positioned on a contact level dielectric material, wherein the resistor body and the e-fuse body are made of the same conductive material, a first plurality of conductive contact structures are coupled to the resistor body, conductive anode and cathode structures are conductively coupled to the e-fuse body, wherein the first plurality of conductive contact structures and the conductive anode and cathode structures are made of the same materials.

Abstract translation: 公开了一种集成电路产品，其包括位于接触电介质材料上的电阻体和电熔体，其中电阻体和电熔体体由相同的导电材料制成，第一多个导电接触结构 耦合到电阻器主体，导电阳极和阴极结构导电地耦合到电熔体本体，其中第一多个导电接触结构和导电阳极和阴极结构由相同的材料制成。

公开(公告)号：US20140264731A1

公开(公告)日：2014-09-18

申请号：US13833934

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES INC.

Inventor： Andrew Kim ,  O Sung Kwon ,  Xiaoqiang Zhang ,  Seung-Hyun Rhee ,  Anurag Mittal

IPC: H01L23/525 ,  H01L23/34

CPC classification number: H01L23/5256 ,  H01L23/345 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One illustrative e-fuse device disclosed herein includes first and second conductive structures, a first electrically conductive heat cage element that is conductively coupled to the first conductive structure, wherein the first heat cage element is adapted to carry an electrical current, a second electrically conductive heat cage element that is conductively coupled to the second conductive structure, wherein the second heat cage element is adapted to carry the electrical current, and a programmable, electrically conductive e-fuse element that is conductively coupled to each of the first and second electrically conductive heat cage elements and adapted to carry the electrical current, wherein the e-fuse element is positioned adjacent to each of the first and second electrically conductive heat cage elements.

Abstract translation: 本文公开的一个示例性电熔丝装置包括第一和第二导电结构，第一导电加热笼元件，其导电耦合到第一导电结构，其中第一加热笼元件适于承载电流，第二导电 导热耦合到所述第二导电结构的热笼形元件，其中所述第二加热笼元件适于承载电流;以及可编程的导电电熔丝元件，其导电地耦合到所述第一和第二导电 加热笼形元件并且适于承载电流，其中所述电熔丝元件邻近所述第一和第二导电加热笼元件中的每一个定位。

公开(公告)号：US20190326209A1

公开(公告)日：2019-10-24

申请号：US15959727

申请日：2018-04-23

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Xiaoqiang Zhang ,  Haizhou Yin ,  Moosung M. Chae ,  Jinping Liu ,  Hui Zang

IPC: H01L23/528 ,  H01L23/525 ,  H01L21/768

Abstract: Interconnect structures and methods of fabricating an interconnect structure. A first interconnect and a second interconnect extend in a first direction in a interlayer dielectric layer and are spaced apart from each other. A third interconnect is arranged in the interlayer dielectric layer to connect the first interconnect with the second interconnect. The first interconnect and the second interconnect have a first width, and the third interconnect has a second width that is less than the first width.

公开(公告)号：US20190019798A1

公开(公告)日：2019-01-17

申请号：US16133176

申请日：2018-09-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xiaoqiang Zhang ,  Hui Zang ,  Ratheesh R. Thankalekshmi ,  Randy W. Mann

IPC: H01L27/11 ,  H01L29/66

CPC classification number: H01L27/1104 ,  H01L27/0207 ,  H01L29/66545 ,  H01L29/66818

Abstract: Various aspects include a static random access memory (SRAM) bitcell array structure. In some cases, the SRAM bitcell array structure includes at least one fin in an array of fins in a substrate, where a width of a first portion of the at least one fin is less than a width of a second portion of the at least one fin in the array of fins.

公开(公告)号：US20180323067A1

公开(公告)日：2018-11-08

申请号：US15587597

申请日：2017-05-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Xusheng Yu ,  John H. Zhang ,  Xiaoqiang Zhang

IPC: H01L21/033 ,  H01L23/525 ,  H01L23/532 ,  H01L21/311

CPC classification number: H01L21/0337 ,  H01L21/31116 ,  H01L21/768 ,  H01L23/5256 ,  H01L23/53214 ,  H01L23/53228

Abstract: Interconnect structures and methods of fabricating an interconnect structure. A first mandrel line, a second mandrel line, and a non-mandrel line between the first mandrel line and the second mandrel line are provided. A first sidewall spacer is formed adjacent to a section of the first mandrel line and is arranged between the section of the first mandrel line and the non-mandrel line. A first cut is formed that extends partially across the non-mandrel line adjacent to the first spacer to narrow a section of the non-mandrel line. The section of the first mandrel line is removed selective to the first sidewall spacer to form a second cut. An interconnect is formed using the non-mandrel line. The interconnect includes a narrowed section coinciding with a location of the narrowed section of the non-mandrel line.

公开(公告)号：US20200118927A1

公开(公告)日：2020-04-16

申请号：US16161590

申请日：2018-10-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xiaoqiang Zhang ,  Guoxiang Ning ,  Jiehui Shu

IPC: H01L23/525 ,  H01L21/768

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an anti-fuse with self-aligned via patterning and methods of manufacture. The anti-fuse includes: a lower wiring layer composed of a plurality of lower wiring structures; at least one via structure in direct contact and misaligned with a first wiring structure of the plurality of lower wiring structures and offset from a second wiring structure of the plurality of lower wiring structures; and an upper wiring layer composed of at least one upper wiring structure in direct contact with the at least one via structure.

公开(公告)号：US10332897B2

公开(公告)日：2019-06-25

申请号：US16133176

申请日：2018-09-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xiaoqiang Zhang ,  Hui Zang ,  Ratheesh R. Thankalekshmi ,  Randy W. Mann

IPC: H01L27/11 ,  H01L29/66 ,  H01L27/02

Abstract: Various aspects include a static random access memory (SRAM) bitcell array structure. In some cases, the SRAM bitcell array structure includes at least one fin in an array of fins in a substrate, where a width of a first portion of the at least one fin is less than a width of a second portion of the at least one fin in the array of fins.

公开(公告)号：US09293414B2

公开(公告)日：2016-03-22

申请号：US14551249

申请日：2014-11-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： O Sung Kwon ,  Xiaoqiang Zhang ,  Anurag Mittal

IPC: H01L23/522 ,  H01L29/00 ,  H01L27/06 ,  H01L27/108 ,  H01L23/525 ,  H01L23/367 ,  H01L23/532 ,  H01L27/10

CPC classification number: H01L23/5256 ,  H01L23/3677 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/53257 ,  H01L27/0629 ,  H01L27/101 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic fuse includes a body, an anode coupled to the body, and a cathode coupled to the body. Each of the anode and the cathode includes a first line contacting the body. The first line is discontinuous along its length and includes a first portion and a second portion with a space therebetween. A second line is disposed above the first line and a plurality of vias couple the first and second lines. The first portion of the first line is coupled to a first subset of the plurality of vias and the second portion of the first line is coupled to a second subset of the vias.

Abstract translation: 电子熔断器包括主体，耦合到主体的阳极和耦合到主体的阴极。 阳极和阴极中的每一个包括接触身体的第一线。 第一线沿其长度是不连续的，并且包括第一部分和第二部分之间的空间。 第二线设置在第一线上方，并且多个通孔耦合第一线和第二线。 第一行的第一部分耦合到多个通孔的第一子集，并且第一行的第二部分耦合到通孔的第二子集。

公开(公告)号：US20150145059A1

公开(公告)日：2015-05-28

申请号：US14581171

申请日：2014-12-23

Applicant: GLOBALFOUNDRIES Inc.

Inventor： O Sung Kwon ,  Xiaoqiang Zhang ,  Anurag Mittal

IPC: H01L27/06 ,  H01L23/532 ,  H01L49/02 ,  H01L23/525

CPC classification number: H01L27/0629 ,  H01L21/76889 ,  H01L23/5225 ,  H01L23/5256 ,  H01L23/53261 ,  H01L27/101 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit product is disclosed that includes a resistor body and an e-fuse body positioned on a contact level dielectric material, wherein the resistor body and the e-fuse body are made of the same conductive material, a first plurality of conductive contact structures are coupled to the resistor body, conductive anode and cathode structures are conductively coupled to the e-fuse body, wherein the first plurality of conductive contact structures and the conductive anode and cathode structures are made of the same materials.

Abstract translation: 公开了一种集成电路产品，其包括位于接触电介质材料上的电阻体和电熔体，其中电阻体和电熔体体由相同的导电材料制成，第一多个导电接触结构 耦合到电阻器主体，导电阳极和阴极结构导电地耦合到电熔体本体，其中第一多个导电接触结构和导电阳极和阴极结构由相同的材料制成。

公开(公告)号：US20200335435A1

公开(公告)日：2020-10-22

申请号：US16918053

申请日：2020-07-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Xiaoqiang Zhang ,  Haizhou Yin ,  Moosung M. Chae ,  Jinping Liu ,  Hui Zang

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/525

Abstract: Interconnect structures and methods of fabricating an interconnect structure. A first interconnect and a second interconnect extend in a first direction in a interlayer dielectric layer and are spaced apart from each other. A third interconnect is arranged in the interlayer dielectric layer to connect the first interconnect with the second interconnect. The first interconnect and the second interconnect have a first width, and the third interconnect has a second width that is less than the first width.