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    SELECTOR DEVICE AND METHOD OF MAKING THE SAME
    11.
    发明申请
    SELECTOR DEVICE AND METHOD OF MAKING THE SAME 审中-公开

    公开(公告)号：US20200052205A1

    公开(公告)日：2020-02-13

    申请号：US16655191

    申请日：2019-10-16

    Applicant: Huazhong University of Science and Technology

    Inventor： Xiangshui MIAO ,  Qi LIN ,  Hao TONG

    IPC: H01L45/00 ,  H01L27/24

    Abstract: A selector device including a first metal electrode layer, a second metal electrode layer and a switching layer disposed between the first metal electrode layer and the second metal electrode layer. The switching layer is a stacked assembly of ABA, BAB, AB or BA, where A is an ion supply layer, and B is a conversion layer. The ion supply layer includes a chalcogenide metal material having a metal content of more than 0% and not more than 50 wt. % with respect to the chalcogenide metal material. The conversion layer includes a chalcogenide material.

    NON-VOLATILE BOOLEAN LOGIC OPERATION CIRCUIT AND OPERATION METHOD THEREOF
    13.
    发明申请
    NON-VOLATILE BOOLEAN LOGIC OPERATION CIRCUIT AND OPERATION METHOD THEREOF 有权
    非挥发性BOOLEAN逻辑操作电路及其操作方法

    公开(公告)号：US20160020766A1

    公开(公告)日：2016-01-21

    申请号：US14867030

    申请日：2015-09-28

    Applicant: Huazhong University of Science and Technology

    Inventor： Xiangshui MIAO ,  Yaxiong ZHOU ,  Yi LI ,  Huajun SUN

    IPC: H03K19/00 ,  H03K19/20

    CPC classification number: H03K19/0002 ,  H03K19/0021 ,  H03K19/0813 ,  H03K19/20

    Abstract: A non-volatile Boolean logic operation circuit, including: two input ends; an output end; a first resistive switching element M1, the first resistive switching element M including a positive electrode and a negative electrode; and a second resistive switching element M2, the second resistive switching element M2 including a positive electrode and a negative electrode. The negative electrode of the first resistive switching element M1 operates as a first input end of the logic operation circuit. The negative electrode of the second resistive switching element M2 operates as a second input end of the logic operation circuit. The positive electrode of the second resistive switching element M2 is connected to the positive electrode of the first resistive switching element M1, and a connected end thereof operates as the output end of the logic operation circuit.

    Abstract translation: 一种非易失性布尔逻辑运算电路，包括：两个输入端; 输出端 第一电阻式开关元件M1，第一电阻式开关元件M包括正极和负极; 和第二电阻开关元件M2，第二电阻开关元件M2包括正极和负极。 第一电阻式开关元件M1的负电极作为逻辑运算电路的第一输入端工作。 第二电阻开关元件M2的负极作为逻辑运算电路的第二输入端工作。 第二电阻开关元件M2的正极与第一电阻式开关元件M1的正极连接，其连接端作为逻辑运算电路的输出端。

    TEMPERATURE SENSING AND COMPUTING DEVICE AND ARRAY BASED ON TaOx ELECTRONIC MEMRISTOR
    15.
    发明申请
    TEMPERATURE SENSING AND COMPUTING DEVICE AND ARRAY BASED ON TaOx ELECTRONIC MEMRISTOR 有权

    公开(公告)号：US20250107460A1

    公开(公告)日：2025-03-27

    申请号：US18760041

    申请日：2024-07-01

    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiaomin CHENG ,  Lijuan CAO ,  Yunhao LUO ,  Jiaqi LI ,  Xiangshui MIAO

    IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

    Abstract: Disclosed is a temperature sensing and computing device and array based on TaOx electronic memristor, including a first metal layer, a function layer, and a second metal layer sequentially stacked from bottom to top; a work function of a metal material in the first metal layer is higher than a work function of a metal material in the second metal layer; the function layer is TaOx material; the first metal layer is grounded, and positive and negative voltages are applied to the second metal layer; in which an output current when the negative voltage is applied to the second metal layer is greater than an output current when the positive voltage of the same magnitude is applied to the second metal layer, and there is a self-rectifying effect; when the voltage of the same magnitude is applied to the second metal layer, the output current increases as a temperature increases.

    THREE-DIMENSIONAL CONVOLUTION OPERATION DEVICE AND METHOD BASED ON THREE-DIMENSIONAL PHASE CHANGE MEMORY
    17.
    发明申请
    THREE-DIMENSIONAL CONVOLUTION OPERATION DEVICE AND METHOD BASED ON THREE-DIMENSIONAL PHASE CHANGE MEMORY 有权

    公开(公告)号：US20220351026A1

    公开(公告)日：2022-11-03

    申请号：US17259191

    申请日：2020-05-28

    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Hao TONG ,  Qing HU ,  Yuhui HE ,  Xiangshui MIAO

    IPC: G06N3/063 ,  G11C13/00

    Abstract: The disclosure discloses a three-dimensional (3D) convolution operation device and method based on a 3D phase change memory, which includes a 3D phase change memory, an input control module, a setting module, and an output control module. By using the 3D phase change memory to perform 3D convolution operation, the phase change units on the same bit line constitute a convolution kernel. Based on the multilayer stack structure, the upper and lower electrodes of the 3D phase change memory serve as the information input terminal, and they are convolved after passing through the respective phase change unit arrays, and the result of the convolution operation is superposed on the middle electrode in the form of current, thereby obtaining the sum of the convolution calculation results of the input information of the upper and lower electrodes, such that the 3D convolution operation is completed in one step.

    READ-WRITE CIRCUIT AND READ-WRITE METHOD OF MEMRISTOR
    18.
    发明申请
    READ-WRITE CIRCUIT AND READ-WRITE METHOD OF MEMRISTOR 有权

    公开(公告)号：US20210407589A1

    公开(公告)日：2021-12-30

    申请号：US17049024

    申请日：2019-11-17

    Applicant: Huazhong University of Science and Technology

    Inventor： Xingsheng WANG ,  Enming HUANG ,  Xiangshui MIAO

    IPC: G11C13/00 ,  G11C7/06

    Abstract: A read-write circuit mainly includes a read circuit and a write circuit. The write circuit comprises: a first voltage selector and a first voltage follower circuit that is electrically connected to the memristor storage array. The read-write circuit further includes a second voltage selector and a second voltage follower circuit that is electrically connected to the memristor storage array. Voltage stable following during bipolar writing is selected through the foregoing selector. Meanwhile, the reading circuit is provided with a variable resistor to select an access mode. The actual read-out voltage and the output voltage passing through the reference resistor under the same read voltage are input into a differential amplifier to obtain read-out data.

    THREE-DIMENSIONAL STACKED MEMORY AND PREPARATION METHOD THEREOF
    19.
    发明申请
    THREE-DIMENSIONAL STACKED MEMORY AND PREPARATION METHOD THEREOF 有权

    公开(公告)号：US20210104670A1

    公开(公告)日：2021-04-08

    申请号：US17040998

    申请日：2018-08-09

    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiangshui MIAO ,  Hao TONG ,  Yushan SHEN

    IPC: H01L45/00 ,  H01L27/24

    Abstract: The disclosure discloses a three-dimensional stacked memory and a preparation method thereof. The storage unit adopts a constrained structure phase change storage unit, and uses a crossbar storage array structure to build a large-capacity storage array. The preparation method includes: preparing N first strip-shaped electrodes along a crystal direction on a substrate; preparing a first insulating layer with M*N array of through holes; filling the M*N array of through holes of the first insulating layer with a phase change material to form first phase change units; preparing M second strip-shaped electrodes; preparing a second insulating layer, using spin-coated photoresist as a sacrificial material, performing a local planarization on the surface of the second insulating layer; forming M*N array of through holes on the second insulating layer; filling a phase change material to form second phase change units; preparing N third strip-shaped electrodes to form a two-layer stacked phase change memory.

    CONVOLUTIONAL NEURAL NETWORK ON-CHIP LEARNING SYSTEM BASED ON NON-VOLATILE MEMORY
    20.
    发明申请
    CONVOLUTIONAL NEURAL NETWORK ON-CHIP LEARNING SYSTEM BASED ON NON-VOLATILE MEMORY 审中-公开

    公开(公告)号：US20200342301A1

    公开(公告)日：2020-10-29

    申请号：US16961932

    申请日：2019-07-12

    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

    Inventor： Xiangshui MIAO ,  Yi LI ,  Wenqian PAN

    IPC: G06N3/063 ,  G06N3/04 ,  G06N3/08 ,  G06F17/15

    Abstract: Disclosed by the disclosure is a convolutional neural network on-chip learning system based on non-volatile memory, comprising: an input module, a convolutional neural network module, an output module and a weight update module. The on-chip learning of the convolutional neural network module implements a synaptic function by using a characteristic which the conductance of a memristor changes according to an applied pulse, and the convolutional kernel value or synaptic weight value is stored in a memristor unit; the input module converts an input signal into a voltage signal required by the convolutional neural network module; the convolutional neural network module converts the input voltage signal level by level, and transmits the result to the output module to obtain an output of the network; and the weight update module adjusts the conductance value of the memristor in the convolutional neural network module according to the result of the output module to update a network convolutional kernel value or synaptic weight value.

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