公开(公告)号：US11907704B2

公开(公告)日：2024-02-20

申请号：US17734669

申请日：2022-05-02

Applicant: Intel Corporation

Inventor： Ned M. Smith ,  Kshitij Arun Doshi ,  John J. Browne ,  Vincent J. Zimmer ,  Francesc Guim Bernat ,  Kapil Sood

IPC: G06F8/65 ,  G06F21/44 ,  G06F21/64 ,  H04L9/12 ,  H04L9/14 ,  H04L9/40 ,  H04L9/32 ,  H04L9/08

CPC classification number: G06F8/65 ,  G06F21/44 ,  G06F21/64 ,  H04L9/0861 ,  H04L9/0891 ,  H04L9/0894 ,  H04L9/12 ,  H04L9/14 ,  H04L9/3213 ,  H04L9/3228 ,  H04L9/3236 ,  H04L9/3247 ,  H04L9/3263 ,  H04L9/3273 ,  H04L63/0876 ,  H04L63/12

Abstract: Various systems and methods for enabling derivation and distribution of an attestation manifest for a software update image are described. In an example, these systems and methods include orchestration functions and communications, providing functionality and components for a software update process which also provides verification and attestation among multiple devices and operators.

公开(公告)号：US11907136B2

公开(公告)日：2024-02-20

申请号：US16820630

申请日：2020-03-16

Applicant: Intel Corporation

Inventor： Ginger H. Gilsdorf ,  Karthik Kumar ,  Mark A. Schmisseur ,  Thomas Willhalm ,  Francesc Guim Bernat

IPC: G06F12/123 ,  G06F12/0891 ,  G11C7/22 ,  G06F1/14 ,  G06F12/02

CPC classification number: G06F12/123 ,  G06F1/14 ,  G06F12/0246 ,  G06F12/0891 ,  G11C7/22

Abstract: An apparatus and/or system is described including a memory device including a memory range and a temporal data management unit (TDMU) coupled to the memory device to receive from an interface, the memory range and a temporal range corresponding to validity of data in the memory range, check the temporal range against a time and/or date value provided by a timer or clock to identify the data in the memory range as expired, and invalidate the data that is expired in the memory device. In some embodiments, the TDMU includes hardware logic that resides on a memory module with the memory device and is coupled to invalidate expired data when the memory module is decoupled from the interface. Other embodiments may be disclosed and claimed.

公开(公告)号：US20230412699A1

公开(公告)日：2023-12-21

申请号：US18456102

申请日：2023-08-25

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer ,  Subrata Banik ,  Marcos Carranza ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Karthik Kumar

IPC: H04L67/51 ,  H04L41/5009 ,  H04L9/32 ,  H04L67/562

CPC classification number: H04L67/51 ,  H04L41/5009 ,  H04L9/3278 ,  H04L67/562 ,  H04L9/50

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.

公开(公告)号：US11838138B2

公开(公告)日：2023-12-05

申请号：US17534132

申请日：2021-11-23

Applicant: Intel Corporation

Inventor： Dario Sabella ,  Ned M. Smith ,  Neal Oliver ,  Kshitij Arun Doshi ,  Suraj Prabhakaran ,  Miltiadis Filippou ,  Francesc Guim Bernat

IPC: H04L12/14 ,  H04L67/1087 ,  H04L67/1074 ,  H04M15/00 ,  H04L67/10 ,  H04L67/12 ,  H04W4/24

CPC classification number: H04L12/1407 ,  H04L67/10 ,  H04L67/1074 ,  H04L67/1087 ,  H04L67/12 ,  H04M15/66 ,  H04M15/8353 ,  H04M15/84 ,  H04M15/85 ,  H04M15/852 ,  H04M15/853 ,  H04M15/886 ,  H04W4/24

Abstract: An architecture to allow Multi-Access Edge Computing (MEC) billing and charge tracking, is disclosed. In an example, a tracking process, such as is performed by an edge computing apparatus, includes: receiving a computational processing request for a service operated with computing resources of the edge computing apparatus from a connected edge device within the first access network, wherein the computational processing request includes an identification of the connected edge device; identifying a processing device, within the first access network, for performing the computational processing request; and storing the identification of the connected edge device, a processing device identification, and data describing the computational processes completed by the processing device in association with the computational processing request.

公开(公告)号：US11824732B2

公开(公告)日：2023-11-21

申请号：US16235462

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Suraj Prabhakaran ,  Kshitij A. Doshi ,  Brinda Ganesh ,  Timothy Verrall

IPC: H04L41/16 ,  G06N3/04 ,  G06N5/04 ,  H04L41/5019 ,  H04L41/5009 ,  H04L41/5051 ,  H04L41/0816

CPC classification number: H04L41/16 ,  G06N3/04 ,  G06N5/04 ,  H04L41/0816 ,  H04L41/5012 ,  H04L41/5019 ,  H04L41/5051

Abstract: Examples include techniques for artificial intelligence (AI) capabilities at a network switch. These examples include receiving a request to register a neural network for loading to an inference resource located at the network switch and loading the neural network based on information included in the request to support an AI service to be provided by users requesting the AI service.

公开(公告)号：US11797690B2

公开(公告)日：2023-10-24

申请号：US16845885

申请日：2020-04-10

Applicant: Intel Corporation

Inventor： Ned Smith ,  Kshitij A. Doshi ,  Francesc Guim Bernat ,  Kapil Sood ,  Tarun Viswanathan

IPC: G06F21/60 ,  H04L9/32 ,  G06F15/173

CPC classification number: G06F21/602 ,  G06F15/17331 ,  H04L9/3268

Abstract: Examples herein relate to an interface selectively providing access to a memory region for a work request from an entity by providing selective access to a physical address of the memory region and selective access to a cryptographic key for use by a memory controller to access the memory region. In some examples, providing selective access to a physical address conversion is based on one or more of: validation of a certificate received with the work request and an identifier of the entity being associated with a process with access to the memory region. Access to the memory region can be specified to be one or more of: create, read, update, delete, write, or notify. A memory region can be a page or sub-page sized region. Different access rights can be associated with different sub-portions of the memory region, wherein the access rights comprise one or more of: create, read, update, delete, write, or notify.

公开(公告)号：US20230199077A1

公开(公告)日：2023-06-22

申请号：US18067097

申请日：2022-12-16

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer ,  Subrata Banik ,  Marcos Carranza ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Karthik Kumar

IPC: H04L67/51 ,  H04L67/562 ,  H04L41/5009 ,  H04L9/32

CPC classification number: H04L67/51 ,  H04L67/562 ,  H04L41/5009 ,  H04L9/3278 ,  H04L9/50

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.

公开(公告)号：US20230195485A1

公开(公告)日：2023-06-22

申请号：US17556690

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Devamekalai Nagasundaram ,  San Yen Wong ,  Haarika Madaka ,  Wei Seng Yeap ,  Marcos Carranza ,  Cesar Martinez Spessot ,  Francesc Guim Bernat ,  Rajesh Poornachandran

IPC: G06F9/455 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/505 ,  G06F2009/4557

Abstract: Embodiments described herein are generally directed to assigning virtual machine (VM) workloads to groupings/partitions of accelerator resources. In an example, a processing resource of a host system maintains: (i) a resource data structure containing resource utilization information for each of one or more accelerators associated with the host system; and (ii) a group data structure containing information regarding each group of multiple groups of one or more virtual functions (VFs) of the one or more accelerators that has been assigned for use by a respective VM of multiple VMs running on a virtual machine monitor (VMM) of the processing resource. A request to deploy a workload associated with a first VM is received. Responsive to the request, the workload is assigned to a VF of a group of the multiple groups determined to have resource capacity available to satisfy expected resource utilization of the workload.

公开(公告)号：US11637687B2

公开(公告)日：2023-04-25

申请号：US16723743

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Ned Smith ,  Francesc Guim Bernat ,  Sanjay Bakshi ,  Paul O'Neill ,  Ben McCahill ,  Brian A. Keating ,  Adrian Hoban ,  Kapil Sood ,  Mona Vij ,  Nilesh Jain ,  Rajesh Poornachandran ,  Trevor Cooper ,  Kshitij A. Doshi ,  Marcin Spoczynski

IPC: H04L29/06 ,  H04L9/00 ,  G06F16/28 ,  H04L9/06

Abstract: Methods, apparatus, systems and articles of manufacture to determine provenance for data supply chains are disclosed. Example instructions cause a machine to at least, in response to data being generated, generate a local data object and object metadata corresponding to the data; hash the local data object; generate a hash of a label of the local data object; generate a hierarchical data structure for the data including the hash of the local data object and the hash of the label of the local data object; generate a data supply chain object including the hierarchical data structure; and transmit the data and the data supply chain object to a device that requested access to the data.

公开(公告)号：US11625277B2

公开(公告)日：2023-04-11

申请号：US16878861

申请日：2020-05-20

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Bassam N. Coury ,  Suraj Prabhakaran ,  Timothy Verrall

IPC: G06F9/50 ,  G06F9/48 ,  H04L67/10

Abstract: Systems and methods may be used to determine where to run a service based on workload-based conditions or system-level conditions. An example method may include determining whether power available to a resource of a compute device satisfies a target power, for example to satisfy a target performance for a workload. When the power available is insufficient, an additional resource may be provided, for example on a remote device from the compute device. The additional resource may be used as a replacement for the resource of the compute device or to augment the resource of the compute device.